Alex Orailoglu

ORCID

Publication Activity (10 Years)

Years Active: 1986-2024
Publications (10 Years): 37

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

DATE

IEEE Trans. Very Large Scale Integr. Syst.

ATS

Publications

Pushpak Raj Gautam, Alex Orailoglu
Transcoders: A Better Alternative To Denoising Autoencoders. ETS (2024)
Alex Orailoglu, Marc Reichenbach, Matthias Jung
Special Issue on SAMOS 2022. Int. J. Parallel Program. 52 (1-2) (2024)
Leon Li, Alex Orailoglu
ClearLock: Deterring Hardware Reverse Engineering Attacks in a White-Box. ATS (2023)
Elbruz Ozen, Alex Orailoglu
Shaping Resilient AI Hardware Through DNN Computational Feature Exploitation. IEEE Des. Test 40 (2) (2023)
Elbruz Ozen, Alex Orailoglu
Unleashing the Potential of Sparse DNNs Through Synergistic Hardware-Sparsity Co-Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (4) (2023)
Leon Li, Alex Orailoglu
Thwarting Reverse Engineering Attacks through Keyless Logic Obfuscation. VTS (2023)
Leon Li, Alex Orailoglu
Redundancy Attack: Breaking Logic Locking Through Oracleless Rationality Analysis. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (4) (2023)
Elbruz Ozen, Alex Orailoglu
Architecting Decentralization and Customizability in DNN Accelerators for Hardware Defect Adaptation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (11) (2022)
Leon Li, Alex Orailoglu
JANUS-HD: Exploiting FSM Sequentiality and Synthesis Flexibility in Logic Obfuscation to Thwart SAT Attack While Offering Strong Corruption. DATE (2022)
Marc Reichenbach, Matthias Jung, Alex Orailoglu
Guest Editorial: Special Issue on 2020 IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS 2020). Int. J. Parallel Program. 50 (2) (2022)
Elbruz Ozen, Alex Orailoglu
Evolving Complementary Sparsity Patterns for Hardware-Friendly Inference of Sparse DNNs. ICCAD (2021)
Chris Nigh, Alex Orailoglu
AdaTrust: Combinational Hardware Trojan Detection Through Adaptive Test Pattern Construction. IEEE Trans. Very Large Scale Integr. Syst. 29 (3) (2021)
Leon Li, Shuyi Ni, Alex Orailoglu
JANUS: Boosting Logic Obfuscation Scope Through Reconfigurable FSM Synthesis. HOST (2021)
Elbruz Ozen, Alex Orailoglu
SNR: Squeezing Numerical Range Defuses Bit Error Vulnerability Surface in Deep Neural Networks. ACM Trans. Embed. Comput. Syst. 20 (5s) (2021)
Chris Nigh, Alex Orailoglu
Taming Combinational Trojan Detection Challenges with Self-Referencing Adaptive Test Patterns. VTS (2020)
Elbruz Ozen, Alex Orailoglu
Boosting Bit-Error Resilience of DNN Accelerators Through Median Feature Selection. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 39 (11) (2020)
Benjamin Tan, Ramesh Karri, Nimisha Limaye, Abhrajit Sengupta, Ozgur Sinanoglu, Md Moshiur Rahman, Swarup Bhunia, Danielle Duvalsaint, Ronald D. Blanton, Amin Rezaei, Yuanqi Shen, Hai Zhou, Leon Li, Alex Orailoglu, Zhaokun Han, Austin Benedetti, Luciano Brignone, Muhammad Yasin, Jeyavijayan Rajendran, Michael Zuzak, Ankur Srivastava, Ujjwal Guin, Chandan Karfa, Kanad Basu, Vivek V. Menon, Matthew French, Peilin Song, Franco Stellari, Gi-Joon Nam, Peter Gadfort, Alric Althoff, Joseph Tostenrude, Saverio Fazzari, Eric Breckenfeld, Kenneth Plaks
Benchmarking at the Frontier of Hardware Security: Lessons from Logic Locking. CoRR (2020)
Elbruz Ozen, Alex Orailoglu
Squeezing Correlated Neurons for Resource-Efficient Deep Neural Networks. ECML/PKDD (2) (2020)
Chengmo Yang, Patrick Cronin, Agamyrat Agambayev, Sule Ozev, A. Enis Çetin, Alex Orailoglu
A Crowd-Based Explosive Detection System with Two-Level Feedback Sensor Calibration. ICCAD (2020)
Elbruz Ozen, Alex Orailoglu
Just Say Zero: Containing Critical Bit-Error Propagation in Deep Neural Networks With Anomalous Feature Suppression. ICCAD (2020)
Elbruz Ozen, Alex Orailoglu
Low-Cost Error Detection in Deep Neural Network Accelerators with Linear Algorithmic Checksums. J. Electron. Test. 36 (6) (2020)
Elbruz Ozen, Alex Orailoglu
Concurrent Monitoring of Operational Health in Neural Networks Through Balanced Output Partitions. ASP-DAC (2020)
Chris Nigh, Alex Orailoglu
Test Pattern Superposition to Detect Hardware Trojans. DATE (2020)
Nickolai Verchok, Alex Orailoglu
Hunting Sybils in Participatory Mobile Consensus-Based Networks. AsiaCCS (2020)
Elbruz Ozen, Alex Orailoglu
Sanity-Check: Boosting the Reliability of Safety-Critical Deep Neural Network Applications. ATS (2019)
Elbruz Ozen, Alex Orailoglu
The Return of Power Gating: Smart Leakage Energy Reductions in Modern Out-of-Order Processor Architectures. ARCS (2019)
Diaa Badawi, Tuba Ayhan, Sule Ozev, Chengmo Yang, Alex Orailoglu, Ahmet Enis Çetin
Detecting Gas Vapor Leaks Using Uncalibrated Sensors. IEEE Access 7 (2019)
Leon Li, Alex Orailoglu
Piercing Logic Locking Keys through Redundancy Identification. DATE (2019)
Leon Li, Alex Orailoglu
Shielding Logic Locking from Redundancy Attacks. VTS (2019)
Diaa Badawi, Tuba Ayhan, Sule Ozev, Chengmo Yang, Alex Orailoglu, A. Enis Çetin
Detecting Gas Vapor Leaks Using Uncalibrated Sensors. CoRR (2019)
Diaa Badawi, Sule Ozev, Jennifer Blain Christen, Chengmo Yang, Alex Orailoglu, A. Enis Çetin
Detecting Gas Vapor Leaks through Uncalibrated Sensor Based CPS. ICASSP (2019)
Fakir Sharif Hossain, Michihiro Shintani, Michiko Inoue, Alex Orailoglu
Variation-Aware Hardware Trojan Detection through Power Side-channel. ITC (2018)
Fakir Sharif Hossain, Tomokazu Yoneda, Michiko Inoue, Alex Orailoglu
Detecting hardware Trojans without a Golden IC through clock-tree defined circuit partitions. ETS (2017)
Joshua Marxen, Alex Orailoglu
Ensuring system security through proximity based authentication. ASP-DAC (2017)
Fakir Sharif Hossain, Tomokazu Yoneda, Michihiro Shintani, Michiko Inoue, Alex Orailoglu
Intra-Die-Variation-Aware Side Channel Analysis for Hardware Trojan Detection. ATS (2017)
Baris Arslan, Alex Orailoglu
Power-Aware Delay Test Quality Optimization for Multiple Frequency Domains. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (1) (2016)
Baris Arslan, Alex Orailoglu
Aggressive Test Cost Reductions Through Continuous Test Effectiveness Assessment. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (12) (2016)
Garo Bournoutian, Alex Orailoglu
Mobile ecosystem driven application-specific low-power control microarchitecture. ICCD (2015)
Garo Bournoutian, Alex Orailoglu
Mobile Ecosystem Driven Dynamic Pipeline Adaptation for Low Power. ARCS (2015)
Mengying Zhao, Alex Orailoglu, Chun Jason Xue
Joint Profit and Process Variation Aware High Level Synthesis With Speed Binning. IEEE Trans. Very Large Scale Integr. Syst. 23 (9) (2015)
Chenchen Fu, Mengying Zhao, Chun Jason Xue, Alex Orailoglu
Sleep-aware variable partitioning for energy-efficient hybrid PRAM and DRAM main memory. ISLPED (2014)
Garo Bournoutian, Alex Orailoglu
On-device objective-C application optimization framework for high-performance mobile processors. DATE (2014)
Keni Qiu, Mengying Zhao, Chun Jason Xue, Alex Orailoglu
Branch Prediction-Directed Dynamic Instruction Cache Locking for Embedded Systems. ACM Trans. Embed. Comput. Syst. 13 (5s) (2014)
Mingjing Chen, Alex Orailoglu
Examining Timing Path Robustness Under Wide-Bandwidth Power Supply Noise Through Multi-Functional-Cycle Delay Test. IEEE Trans. Very Large Scale Integr. Syst. 22 (4) (2014)
Baris Arslan, Alex Orailoglu
Tracing the best test mix through multi-variate quality tracking. VTS (2013)
Raymond Paseman, Alex Orailoglu
Towards a cost-effective hardware trojan detection methodology. VTS (2013)
Mengying Zhao, Alex Orailoglu, Chun Jason Xue
Profit maximization through process variation aware high level synthesis with speed binning. DATE (2013)
Baris Arslan, Alex Orailoglu
Full exploitation of process variation space for continuous delivery of optimal delay test quality. ASP-DAC (2013)
Keni Qiu, Mengying Zhao, Chun Jason Xue, Alex Orailoglu
Branch Prediction directed Dynamic instruction Cache Locking for embedded systems. RTCSA (2013)
Tiantian Liu, Alex Orailoglu, Chun Jason Xue, Minming Li
Register allocation for embedded systems to simultaneously reduce energy and temperature on registers. ACM Trans. Embed. Comput. Syst. 13 (3) (2013)
Garo Bournoutian, Alex Orailoglu
Application-aware adaptive cache architecture for power-sensitive mobile processors. ACM Trans. Embed. Comput. Syst. 13 (3) (2013)
Mingjing Chen, Alex Orailoglu
On Diagnosis of Timing Failures in Scan Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31 (7) (2012)
Garo Bournoutian, Alex Orailoglu
Dynamic transient fault detection and recovery for embedded processor datapaths. CODES+ISSS (2012)
Baris Arslan, Alex Orailoglu
Delay test resource allocation and scheduling for multiple frequency domains. VTS (2012)
Francisco J. Galarza-Medina, Jose Luis Garcia-Gervacio, Víctor H. Champac, Alex Orailoglu
Small-delay defects detection under process variation using Inter-Path Correlation. VTS (2012)
Mingjing Chen, Alex Orailoglu
Scan Power Reduction for Linear Test Compression Schemes Through Seed Selection. IEEE Trans. Very Large Scale Integr. Syst. 20 (12) (2012)
Chengmo Yang, Alex Orailoglu
Tackling Resource Variations Through Adaptive Multicore Execution Frameworks. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31 (1) (2012)
Baris Arslan, Alex Orailoglu
Adaptive Test Framework for Achieving Target Test Quality at Minimal Cost. Asian Test Symposium (2011)
Baris Arslan, Alex Orailoglu
Adaptive test optimization through real time learning of test effectiveness. DATE (2011)
Mingjing Chen, Alex Orailoglu
Diagnosing scan clock delay faults through statistical timing pruning. DAC (2011)
Yuping Zhang, Chun Jason Xue, Chengmo Yang, Alex Orailoglu
Migration-aware adaptive MPSoC static schedules with dynamic reconfigurability. J. Parallel Distributed Comput. 71 (10) (2011)
Wenjing Rao, Chengmo Yang, Ramesh Karri, Alex Orailoglu
Toward Future Systems with Nanoscale Devices: Overcoming the Reliability Challenge. Computer 44 (2) (2011)
Chengmo Yang, Alex Orailoglu
Full Fault Resilience and Relaxed Synchronization Requirements at the Cache-Memory Interface. IEEE Trans. Very Large Scale Integr. Syst. 19 (11) (2011)
Tiantian Liu, Alex Orailoglu, Chun Jason Xue, Minming Li
Register allocation for simultaneous reduction of energy and peak temperature on registers. DATE (2011)
Chengmo Yang, Alex Orailoglu
Frugal but flexible multicore topologies in support of resource variation-driven adaptivity. DATE (2011)
Garo Bournoutian, Alex Orailoglu
Dynamic, multi-core cache coherence architecture for power-sensitive mobile processors. CODES+ISSS (2011)
Mingjing Chen, Alex Orailoglu
Diagnosing scan chain timing faults through statistical feature analysis of scan images. DATE (2011)
Chengmo Yang, Alex Orailoglu
Fully adaptive multicore architectures through statically-directed dynamic execution reconfigurations. VLSI-SoC (2010)
Chengmo Yang, Chun Jason Xue, Alex Orailoglu
Fine-grained adaptive CMP cache sharing through access history exploitation. VLSI-SoC (2010)
Garo Bournoutian, Alex Orailoglu
Dynamic, non-linear cache architecture for power-sensitive mobile processors. CODES+ISSS (2010)
Chengmo Yang, Mingjing Chen, Alex Orailoglu
Squashing code size in microcoded IPs while delivering high decompression speed. Des. Autom. Embed. Syst. 14 (3) (2010)
Kwangyoon Lee, Alex Orailoglu
High durability in NAND flash memory through effective page reuse mechanisms. CODES+ISSS (2010)
Baris Arslan, Alex Orailoglu
Delay test quality maximization through process-aware selection of test set size. ICCD (2010)
Mingjing Chen, Alex Orailoglu
Cost-effective IR-drop failure identification and yield recovery through a failure-adaptive test scheme. DATE (2010)
Garo Bournoutian, Alex Orailoglu
Reducing impact of cache miss stalls in embedded systems by extracting guaranteed independent instructions. Des. Autom. Embed. Syst. 14 (3) (2010)
Raid Ayoub, Alex Orailoglu
Performance and energy efficient cache migrationapproach for thermal management in embedded systems. ACM Great Lakes Symposium on VLSI (2010)
Sunghoon Chun, Alex Orailoglu
DiSC: A New Diagnosis Method for Multiple Scan Chain Failures. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 29 (12) (2010)
Mingjing Chen, Alex Orailoglu
VDDmin test optimization for overscreening minimization through adaptive scan chain masking. VTS (2010)
Chengmo Yang, Mingjing Chen, Alex Orailoglu
Squashing microcode stores to size in embedded systems while delivering rapid microcode accesses. CODES+ISSS (2009)
Saturnino Garcia, Alex Orailoglu
Making DNA self-assembly error-proof: Attaining small growth error rates through embedded information redundancy. DATE (2009)
Garo Bournoutian, Alex Orailoglu
Reducing impact of cache miss stalls in embedded systems by extracting guaranteed independent instructions. CASES (2009)
Chengmo Yang, Alex Orailoglu
Towards no-cost adaptive MPSoC static schedules through exploitation of logical-to-physical core mapping latitude. DATE (2009)
Alex Orailoglu, Laura Pozzi
Guest Editorial Special Section on the IEEE Symposium on Application Specific Processors 2008. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28 (12) (2009)
Mingjing Chen, Alex Orailoglu
Scan power reduction in linear test data compression scheme. ICCAD (2009)
Ozgur Sinanoglu, Mohammed Al-Mulla, Noora A. Shunaiber, Alex Orailoglu
Scan Cell Positioning for Boosting the Compression of Fan-Out Networks. J. Comput. Sci. Technol. 24 (5) (2009)
Mingjing Chen, Alex Orailoglu
Deflecting crosstalk by routing reconsideration through refined signal correlation estimation. ACM Great Lakes Symposium on VLSI (2009)
Dong Xiang, Dianwei Hu, Qiang Xu, Alex Orailoglu
Low-Power Scan Testing for Test Data Compression Using a Routing-Driven Scan Architecture. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28 (7) (2009)
Wenjing Rao, Alex Orailoglu, Ramesh Karri
Logic Mapping in Crossbar-Based Nanoarchitectures. IEEE Des. Test Comput. 26 (1) (2009)
Chengmo Yang, Alex Orailoglu
Processor reliability enhancement through compiler-directed register file peak temperature reduction. DSN (2009)
Raid Ayoub, Alex Orailoglu
Filtering Global History: Power and Performance Efficient Branch Predictor. ASAP (2009)
Mingjing Chen, Alex Orailoglu
Flip-Flop Hardening and Selection for Soft Error and Delay Fault Resilience. DFT (2009)
Wenjing Rao, Alex Orailoglu
Towards fault tolerant parallel prefix adders in nanoelectronic systems. DATE (2008)
Kwangyoon Lee, Alex Orailoglu
Application specific non-volatile primary memory for embedded systems. CODES+ISSS (2008)
Saturnino Garcia, Alex Orailoglu
Online test and fault-tolerance for nanoelectronic programmable logic arrays. NANOARCH (2008)
Wenjing Rao, Alex Orailoglu, Keith Marzullo
Locality aware redundancy allocation in nanoelectronic systems. NANOARCH (2008)
Mingjing Chen, Alex Orailoglu
Test cost minimization through adaptive test development. ICCD (2008)
Kwangyoon Lee, Alex Orailoglu
Application Specific Low Latency Instruction Cache for NAND Flash Memory Based Embedded Systems. SASP (2008)
Garo Bournoutian, Alex Orailoglu
Miss reduction in embedded processors through dynamic, power-friendly cache design. DAC (2008)
Chengmo Yang, Alex Orailoglu
A light-weight cache-based fault detection and checkpointing scheme for MPSoCs enabling relaxed execution synchronization. CASES (2008)
Fawnizu Azmadi Hussin, Tomokazu Yoneda, Alex Orailoglu, Hideo Fujiwara
Scheduling Power-Constrained Tests through the SoC Functional Bus. IEICE Trans. Inf. Syst. (3) (2008)

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Publication Activity (10 Years)

Top Topics

Top Venues

Alex Orailoglu