Marc Reichenbach

ORCID

Publication Activity (10 Years)

Years Active: 2009-2023
Publications (10 Years): 72

Top Venues

University of Erlangen-Nuremberg, Germany (PHD)

Education History

University of Erlangen-Nuremberg, Germany

PHD

Publications

Alexander Lehnert, Hans Rosenberger, Ralf R. Müller, Marc Reichenbach
More Efficient CMMs on FPGAs: Instantiated Ternary Adders for Computation Coding. ARC (2023)
Running Guo, Ruolan Jia, Stefan Pechmann, Marc Reichenbach, Amelie Hagelauer
A High-speed Low-power Sense Amplifier for the RRAM Array with Multi-level Reading Function using 130-nm Technology. ICECS (2023)
Johannes Knödtel, Hector Gerardo Muñoz Hernandez, Alexander Lehnert, Gia Bao Thieu, Sven Gesper, Guillermo Payá Vayá, Marc Reichenbach
TAPRE-HBM: Trace-Based Processor Rapid Emulation Using HBM on FPGAs. ARC (2023)
Ralf R. Müller, Hans Rosenberger, Marc Reichenbach
Linear Computation Coding for Convolutional Neural Networks. SSP (2023)
Markus Fritscher, Alessandro Veronesi, Andrea Baroni, Jianan Wen, Thorsten Spätling, Mamathamba Kalishettyhalli Mahadevaiah, Norbert Herfurth, Eduardo Perez, Markus Ulbricht, Marc Reichenbach, Amelie Hagelauer, Milos Krstic
Prototyping Reconfigurable RRAM-Based AI Accelerators Using the RISC-V Ecosystem and Digital Twins. ISC Workshops (2023)
Alexander Lehnert, Philipp Holzinger, Simon Pfenning, Ralf Müller, Marc Reichenbach
Most Resource Efficient Matrix Vector Multiplication on FPGAs. IEEE Access 11 (2023)
Abhinav Vishwakarma, Markus Fritscher, Amelie Hagelauer, Marc Reichenbach
An RRAM-based building block for reprogrammable non-uniform sampling ADCs. it Inf. Technol. 65 (1-2) (2023)
Christian Skubich, Peter Reichel, Marc Reichenbach
Increasing the Robustness of TERO-TRNGs Against Process Variation. ACM Trans. Reconfigurable Technol. Syst. 16 (3) (2023)
Johannes Knödtel, Marc Reichenbach
Datapath Optimization for Embedded Signal Processing Architectures utilizing Design Space Exploration. DroneSE/RAPIDO@HiPEAC (2023)
Farshad Firouzi, Krishnendu Chakrabarty, Naghmeh Karimi, Bahareh J. Farahani, Diana Goehringer, Aurora Gil de Castro, Marc Reichenbach, Kun-Chih Chen
Welcome Message from the Chairs. COINS (2023)
Safdar Mahmood, Michael Hübner, Marc Reichenbach
A Design-Space Exploration Framework for Application-Specific Machine Learning Targeting Reconfigurable Computing. ARC (2023)
Keyvan Shahin, Randolf Rotta, Oscar Archila, Pavlo Mykytyn, Matthias Nattke, Marc Reichenbach, Jörg Nolte, Roman Natarov
A Modular Communication Architecture for Adaptive UAV Swarms. COINS (2023)
Max Uhlmann, Emilio Pérez-Bosch Quesada, Markus Fritscher, Eduardo Pérez, Markus Andreas Schubert, Marc Reichenbach, Philip Ostrovskyy, Christian Wenger, Gerhard Kahmen
One-Transistor-Multiple-RRAM Cells for Energy-Efficient In-Memory Computing. NEWCAS (2023)
Daniel Reiser, Marc Reichenbach, Tommaso Rizzi, Andrea Baroni, Markus Fritscher, Christian Wenger, Cristian Zambelli, Davide Bertozzi
Technology-Aware Drift Resilience Analysis of RRAM Crossbar Array Configurations. NEWCAS (2023)
Lars Schwenger, Philipp Holzinger, Dietmar Fey, Hector Gerardo Muñoz Hernandez, Marc Reichenbach
EasyHBM: Simple and Fast HBM Access for FPGAs Using High-Level-Synthesis. SAMOS (2022)
Safdar Mahmood, Stefan Scharoba, Jonas Schorlemer, Christian Schulz, Michael Hübner, Marc Reichenbach
Detecting Improvised Land-mines using Deep Neural Networks on GPR Image Dataset targeting FPGAs. NorCAS (2022)
Priscile Suawa, Tenia Meisel, Marcel Jongmanns, Michael Hübner, Marc Reichenbach
Modeling and Fault Detection of Brushless Direct Current Motor by Deep Learning Sensor Data Fusion. Sensors 22 (9) (2022)
Florian Fricke, Stefan Scharoba, Sebastian Rachuj, Andreas Konopik, Florian Kluge, Georg Hofstetter, Marc Reichenbach
Application Runtime Estimation for AURIX Embedded MCU Using Deep Learning. SAMOS (2022)
Hector Gerardo Muñoz Hernandez, Florian Fricke, Muhammed Al Kadi, Marc Reichenbach, Michael Hübner
Edge GPU based on an FPGA Overlay Architecture using PYNQ. SBCCI (2022)
Kwame Owusu Ampadu, Florian Rokohl, Safdar Mahmood, Marc Reichenbach, Michael Hübner
InjectMeAI - Software Module of an Autonomous Injection Humanoid. Sensors 22 (14) (2022)
Marc Reichenbach, Matthias Jung, Alex Orailoglu
Guest Editorial: Special Issue on 2020 IEEE International Conference on Embedded Computer Systems: Architectures, Modeling and Simulation (SAMOS 2020). Int. J. Parallel Program. 50 (2) (2022)
Johannes Knödtel, Sebastian Rachuj, Marc Reichenbach
Suitability of ISAs for Data Paths Based on Redundant Number Systems: Is RISC-V the best? DSD (2022)
Marc Reichenbach, Johannes Knödtel, Sebastian Rachuj, Dietmar Fey
RISC-V3: A RISC-V Compatible CPU With a Data Path Based on Redundant Number Systems. IEEE Access 9 (2021)
Philipp Holzinger, Daniel Reiser, Tobias Hahn, Marc Reichenbach
Fast HBM Access with FPGAs: Analysis, Architectures, and Applications. IPDPS Workshops (2021)
Markus Fritscher, Johannes Knödtel, Daniel Reiser, Maen Mallah, Stefan Pechmann, Dietmar Fey, Marc Reichenbach
Simulating large neural networks embedding MLC RRAM as weight storage considering device variations. LASCAS (2021)
Marco Breiling, Bijoy Kundu, Marc Reichenbach
. ERCIM News 2021 (125) (2021)
Simon Pfenning, Philipp Holzinger, Marc Reichenbach
Transparent FPGA Acceleration with TensorFlow. CoRR (2021)
Markus Fritscher, Johannes Knödtel, Maen Mallah, Stefan Pechmann, Emilio Pérez-Bosch Quesada, Tommaso Rizzi, Christian Wenger, Marc Reichenbach
Mitigating the Effects of RRAM Process Variation on the Accuracy of Artificial Neural Networks. SAMOS (2021)
Philipp Holzinger, Marc Reichenbach
The HERA Methodology: Reconfigurable Logic in General-Purpose Computing. IEEE Access 9 (2021)
Burkhard Ringlein, François Abel, Dionysios Diamantopoulos, Beat Weiss, Christoph Hagleitner, Marc Reichenbach, Dietmar Fey
A Case for Function-as-a-Service with Disaggregated FPGAs. CLOUD (2021)
Anne D. Koelewijn, Musa L. Audu, Antonio J. del Ama, Annalisa Colucci, Josep M. Font-Llagunes, Antonio Gogeascoechea, Sandra K. Hnat, Nathan Makowski, Juan C. Moreno, Mark J. Nandor, Roger D. Quinn, Marc Reichenbach, Ryan-David Reyes, Massimo Sartori, Surjo R. Soekadar, Ronald J. Triolo, Mareike Vermehren, Christian Wenger, Utku S. Yavuz, Dietmar Fey, Philipp Beckerle
Adaptation Strategies for Personalized Gait Neuroprosthetics. Frontiers Neurorobotics 15 (2021)
Steffen Vaas, Peter Ulbrich, Christian Eichler, Peter Wägemann, Marc Reichenbach, Dietmar Fey
Taming Non-Deterministic Low-Level I/O: Predictable Multi-Core Real-Time Systems by SoC Co-Design. ISORC (2021)
Sebastian Rachuj, Dietmar Fey, Marc Reichenbach
Impact of Performance Estimation on Fast Processor Simulators. SimuTools (2) (2020)
Johannes Knödtel, Markus Fritscher, Daniel Reiser, Dietmar Fey, Marco Breiling, Marc Reichenbach
A Model-to-Circuit Compiler for Evaluation of DNN Accelerators based on Systolic Arrays and Multibit Emerging Memories. MOCAST (2020)
Rashid Ali, Maen Mallah, Martin Leyh, Philipp Holzinger, Marco Breiling, Marc Reichenbach, Dietmar Fey
A Hardware Inference Accelerator for Temporal Convolutional Networks. NORCAS (2019)
Marc Reichenbach, Philipp Holzinger, Konrad Häublein, Tobias Lieske, Paul Blinzer, Dietmar Fey
Heterogeneous Computing Utilizing FPGAs - A New and Flexible Approach Integrating Dedicated Hardware Accelerators into Common Computing Platforms. J. Signal Process. Syst. 91 (7) (2019)
Markus Fritscher, Johannes Knödtel, Marc Reichenbach, Dietmar Fey
Simulating Memristive Systems in Mixed-Signal Mode using Commercial Design Tools. ICECS (2019)
Steffen Vaas, Peter Ulbrich, Marc Reichenbach, Dietmar Fey
Application-Specific Tailoring of Multi-Core SoCs for Real-Time Systems with Diverse Predictability Demands. J. Signal Process. Syst. 91 (7) (2019)
Sebastian Rachuj, Marc Reichenbach, Dietmar Fey
A Generic Functional Simulation of Heterogeneous Systems. ARCS (2019)
Wolfgang Bauer, Philipp Holzinger, Marc Reichenbach, Steffen Vaas, Paul Hartke, Dietmar Fey
Programmable HSA Accelerators for Zynq UltraScale+ MPSoC Systems. Euro-Par Workshops (2018)
Philipp Holzinger, Marc Reichenbach, Dietmar Fey
A new generic HLS approach for heterogeneous computing: on the feasibility of high-level synthesis in HSA-compatible systems. SAMOS (2018)
Christopher Soell, Marc Reichenbach, Juergen Roeber, Amelie Hagelauer, Robert Weigel, Dietmar Fey
Case study on memristor-based multilevel memories. Int. J. Circuit Theory Appl. 46 (1) (2018)
Lan Shi, Christopher Soell, Benjamin Pfundt, Andreas Baenisch, Marc Reichenbach, Jürgen Seiler, Thomas Ussmueller, Robert Weigel
A flexible mixed-signal image processing pipeline using 3D chip stacks. J. Real Time Image Process. 14 (3) (2018)
Johannes Knödtel, Wolffhardt Schwabe, Tobias Lieske, Marc Reichenbach, Dietmar Fey
A Novel Methodology for Evaluating the Energy Consumption of IP Blocks in System-Level Designs. PATMOS (2018)
Sebastian Rachuj, Christian Herglotz, Marc Reichenbach, André Kaup, Dietmar Fey
A Hybrid Approach for Runtime Analysis Using a Cycle and Instruction Accurate Model. ARCS (2018)
Marc Reichenbach, Lukas Liebischer, Steffen Vaas, Dietmar Fey
Comparison of Lane Detection Algorithms for ADAS Using Embedded Hardware Architectures. DASIP (2018)
Sebastian Rachuj, Marc Reichenbach, Steffen Vaas, Dietmar Fey
Autonomous Driving in the Curriculum of Computer Architecture. EWME (2018)
Christian Herglotz, Dominic Springer, Marc Reichenbach, Benno Stabernack, André Kaup
Modeling the Energy Consumption of the HEVC Decoding Process. IEEE Trans. Circuits Syst. Video Technol. 28 (1) (2018)
Christian Hartmann, Konrad Häublein, Marc Reichenbach, Dietmar Fey
IPAS: a design framework for analysis, synthesis and optimization of image processing applications for heterogenous computing architectures. J. Real Time Image Process. 14 (3) (2018)
Marc Reichenbach, Maximilian Kasparek, Konrad Häublein, Jan Niklas Bauer, Mohammad Alawieh, Dietmar Fey
Fast heterogeneous computing architectures for smart antennas. J. Syst. Archit. 76 (2017)
Steffen Vaas, Peter Ulbrich, Marc Reichenbach, Dietmar Fey
The best of both: High-performance anc deterministic real-time executive by application-specific multi-core SoCs. DASIP (2017)
Marc Reichenbach, Philipp Holzinger, Konrad Häublein, Tobias Lieske, Paul Blinzer, Dietmar Fey
LibHSA: One step towards mastering the era of heterogeneous hardware accelerators using FPGAs. DASIP (2017)
Daniel Wust, Mehrdad Biglari, Johannes Knödtel, Marc Reichenbach, Christopher Söll, Dietmar Fey
Prototyping memristors in digital system with an FPGA-based testing environment. PATMOS (2017)
Tobias Lieske, Benjamin Pfundt, Steffen Vaas, Marc Reichenbach, Dietmar Fey
System on chip generation for multi-sensor and sensor fusion applications. SAMOS (2017)
Benjamin Pfundt, Marc Reichenbach, Dietmar Fey
Comprehensive curriculum for reconfigurable heterogeneous computer architecture education. IET Circuits Devices Syst. 11 (4) (2017)
Benjamin Pfundt, Marc Reichenbach, Christian Hartmann, Konrad Häublein, Dietmar Fey
Teaching heterogeneous computer architectures using smart camera systems. EWME (2016)
Konrad Häublein, Marc Reichenbach, Oliver Reiche, M. Akif Ozkan, Dietmar Fey, Frank Hannig, Jürgen Teich
Hybrid code description for developing fast and resource efficient image processing architectures. SAMOS (2016)
Steffen Vaas, Marc Reichenbach, Dietmar Fey
An Application-Specific Instruction Set Processor for Power Quality Monitoring. IPDPS Workshops (2016)
Konrad Häublein, Christian Hartmann, Marc Reichenbach, Dietmar Fey
Fast and Resource Aware Image Processing Operators Utilizing Highly Configurable IP Blocks. ARC (2016)
Dietmar Fey, Marc Reichenbach, Christopher Söll, Mehrdad Biglari, Jürgen Röber, Robert Weigel
Using Memristor Technology for Multi-value Registers in Signed-digit Arithmetic Circuits. MEMSYS (2016)
Steffen Vaas, Marc Reichenbach, Ulrich Margull, Dietmar Fey
The R2-D2 toolchain - Automated porting of safety-critical applications to FPGAs. ReConFig (2016)
Tobias Lieske, Marc Reichenbach, Burkhard Ringlein, Dietmar Fey
Dataflow optimization for programmable embedded image preprocessing accelerators. ReConFig (2016)
Alexander Steg, Marc Reichenbach, Christopher Soell, Lan Shi, Andreas K. Maier, Christian Riess
Dynamic pixel binning allows spatial and angular resolution tradeoffs to improve image quality in X-ray C-arm CT. ISBI (2016)
Christopher Soell, Lan Shi, Jürgen Röber, Marc Reichenbach, Robert Weigel, Amelie Hagelauer
Low-power analog smart camera sensor for edge detection. ICIP (2016)
Marc Reichenbach, Benjamin Pfundt, Dietmar Fey
Framework for parameter analysis of FPGA-based image processing architectures. SAMOS (2015)
Christian Herglotz, Jürgen Seiler, André Kaup, Arne Hendricks, Marc Reichenbach, Dietmar Fey
Estimation of Non-functional Properties for Embedded Hardware with Application to Image Processing. IPDPS Workshops (2015)
Christian Hartmann, Anna Yupatova, Marc Reichenbach, Dietmar Fey, Reinhard German
A Holistic Approach for Modeling and Synthesis of Image Processing Applications for Heterogeneous Computing Architectures. CoRR (2015)
Oliver Reiche, Konrad Häublein, Marc Reichenbach, Moritz Schmid, Frank Hannig, Jürgen Teich, Dietmar Fey
Synthesis and optimization of image processing accelerators using domain knowledge. J. Syst. Archit. 61 (10) (2015)
Bruno Kleinert, Gholam Reza Rahimi, Marc Reichenbach, Dietmar Fey
Hardware-software co-simulation for medical x-ray control units. SimuTools (2015)
Marc Reichenbach, Maximilian Kasparek, Mohammad Alawieh, Konrad Häublein, Dietmar Fey
Real-time correlation for locating systems utilizing heterogeneous computing architectures. DASIP (2015)
Marc Reichenbach, Tobias Lieske, Steffen Vaas, Konrad Häublein, Dietmar Fey
FAUPU - A design framework for the development of programmable image processing architectures. ReConFig (2015)
Oliver Reiche, Konrad Häublein, Marc Reichenbach, Frank Hannig, Jürgen Teich, Dietmar Fey
Automatic Optimization of Hardware Accelerators for Image Processing. CoRR (2015)
Marc Reichenbach, Ralf Seidler, Benjamin Pfundt, Dietmar Fey
Fast image processing for optical metrology utilizing heterogeneous computer architectures. Comput. Electr. Eng. 40 (4) (2014)
Marc Reichenbach, Benjamin Pfundt, Dietmar Fey
Designing and manufacturing of real embedded multi-core CPUs: A holistic teaching approach in computer architecture. EWME (2014)
Konrad Häublein, Marc Reichenbach, Dietmar Fey
Fast and generic hardware architecture for stereo block matching applications on embedded systems. ReConFig (2014)
Benjamin Pfundt, Marc Reichenbach, Björn M. Eskofier, Dietmar Fey
Smart sensor architectures for embedded biosignal analysis. DASIP (2013)
Marc Reichenbach, Ralf Seidler, Dietmar Fey
Heterogeneous computer architectures: An image processing pipeline for optical metrology. ReConFig (2012)
Michael Schmidt, Marc Reichenbach, Dietmar Fey
A Generic VHDL Template for 2D Stencil Code Applications on FPGAs. ISORC Workshops (2012)
Dietmar Fey, Marc Reichenbach, Marcus Komann, Ralf Seidler
Realizing real-time centroid detection of multiple objects with marching pixels algorithms on programmable customizing hardware. Concurr. Comput. Pract. Exp. 24 (16) (2012)
Benjamin Pfundt, Marc Reichenbach
Optimierung einer parallelen SIMD-Architektur für FPGA und ASIC. Informatiktage (2011)
Marc Reichenbach, Michael Schmidt, Dietmar Fey
Analytical Model for the Optimization of Self-Organizing Image Processing Systems Utilizing Cellular Automata. ISORC Workshops (2011)
Dietmar Fey, Marcus Komann, Marc Reichenbach, Ralf Seidler
Realizing Real-Time Centroid Detection of Multiple Objects with Marching Pixels Algorithms. ISORC Workshops (2010)
Sándor P. Fekete, Dietmar Fey, Marcus Komann, Alexander Kröller, Marc Reichenbach, Christiane Schmidt
Distributed vision with smart pixels. SCG (2009)

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Publication Activity (10 Years)

Top Topics

Top Venues

Marc Reichenbach