Moritz Schmid

Publication Activity (10 Years)

Years Active: 2008-2018
Publications (10 Years): 5

Top Venues

ASAP

J. Signal Process. Syst.

FCCM

CoRR

University of Erlangen-Nuremberg (PHD)

Education History

University of Erlangen-Nuremberg

PHD

Publications

Oliver Reiche, M. Akif Ozkan, Frank Hannig, Jürgen Teich, Moritz Schmid
Loop Parallelization Techniques for FPGA Accelerator Synthesis. J. Signal Process. Syst. 90 (1) (2018)
Christian Schmitt, Moritz Schmid, Sebastian Kuckuk, Harald Köstler, Jürgen Teich, Frank Hannig
Reconfigurable Hardware Generation of Multigrid Solvers with Conjugate Gradient Coarse-Grid Solution. Parallel Process. Lett. 28 (4) (2018)
Vivek Singh Bhadouria, Alexandru Tanase, Moritz Schmid, Frank Hannig, Jürgen Teich, Dibyendu Ghoshal
A Novel Image Impulse Noise Removal Algorithm Optimized for Hardware Accelerators. J. Signal Process. Syst. 89 (2) (2017)
Oliver Reiche, Konrad Häublein, Marc Reichenbach, Moritz Schmid, Frank Hannig, Jürgen Teich, Dietmar Fey
Synthesis and optimization of image processing accelerators using domain knowledge. J. Syst. Archit. 61 (10) (2015)
Moritz Schmid, Oliver Reiche, Frank Hannig, Jürgen Teich
Loop coarsening in C-based High-Level Synthesis. ASAP (2015)
Moritz Schmid, Alexandru Tanase, Frank Hannig, Jürgen Teich, Vivek Singh Bhadouria, Dibyendu Ghoshal
Domain-specific augmentations for High-Level Synthesis. ASAP (2014)
Moritz Schmid, Nicolas Apelt, Frank Hannig, Jürgen Teich
An image processing library for C-based high-level synthesis. FPL (2014)
Oliver Reiche, Moritz Schmid, Frank Hannig, Richard Membarth, Jürgen Teich
Code generation from a domain-specific language for C-based HLS of hardware accelerators. CODES+ISSS (2014)
Moritz Schmid, Oliver Reiche, Christian Schmitt, Frank Hannig, Jürgen Teich
Code Generation for High-Level Synthesis of Multiresolution Applications on FPGAs. CoRR (2014)
Frank Hannig, Moritz Schmid, Vahid Lari, Srinivas Boppu, Jürgen Teich
System integration of tightly-coupled processor arrays using reconfigurable buffer structures. Conf. Computing Frontiers (2013)
Moritz Schmid, Markus Blocherer, Frank Hannig, Jürgen Teich
Real-timerange image preprocessing on FPGAs. ReConFig (2013)
Moritz Schmid, Frank Hannig, Alexandru Tanase, Jürgen Teich
High-Level Synthesis Revised - Generation of FPGA Accelerators from a Domain-Specific Language using the Polyhedron Model. PARCO (2013)
Moritz Schmid, Frank Hannig, Jürgen Teich
Power Management Strategies for Serial RapidIO Endpoints in FPGAs. FCCM (2012)
Vahid Lari, Shravan Muddasani, Srinivas Boppu, Frank Hannig, Moritz Schmid, Jürgen Teich
Hierarchical power management for adaptive tightly-coupled processor arrays. ACM Trans. Design Autom. Electr. Syst. 18 (1) (2012)
Jakob Wasza, Sebastian Bauer, Sven Haase, Moritz Schmid, Sebastian Reichert, Joachim Hornegger
RITK: The Range Imaging Toolkit - A Framework for 3-D Range Image Stream Processing. VMV (2011)
Frank Hannig, Moritz Schmid, Jürgen Teich, Heinz Hornegger
A deeply pipelined and parallel architecture for denoising medical images. FPT (2010)
Hritam Dutta, Frank Hannig, Moritz Schmid, Joachim Keinert
Modeling and synthesis of communication subsystems for loop accelerator pipelines. ASAP (2010)
Moritz Schmid, Daniel Ziener, Jürgen Teich
Netlist-level IP protection by watermarking for LUT-based FPGAs. FPT (2008)

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Publication Activity (10 Years)

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Moritz Schmid