Florian Fricke

Publication Activity (10 Years)

Years Active: 2016-2022
Publications (10 Years): 14

Top Topics

Software Implementation

Top Venues

IPDPS Workshops

Publications

Florian Fricke, Stefan Scharoba, Sebastian Rachuj, Andreas Konopik, Florian Kluge, Georg Hofstetter, Marc Reichenbach
Application Runtime Estimation for AURIX Embedded MCU Using Deep Learning. SAMOS (2022)
Florian Fricke, Marcelo Brandalero, Sascha Liehr, Simon Kern, Klas Meyer, Stefan Kowarik, Robin Hierzegger, Stephan Westerdick, Michael Maiwald, Michael Hübner
Artificial Intelligence for Mass Spectrometry and Nuclear Magnetic Resonance Spectroscopy Using a Novel Data Augmentation Method. IEEE Trans. Emerg. Top. Comput. 10 (1) (2022)
Hector Gerardo Muñoz Hernandez, Florian Fricke, Muhammed Al Kadi, Marc Reichenbach, Michael Hübner
Edge GPU based on an FPGA Overlay Architecture using PYNQ. SBCCI (2022)
Florian Fricke
A Novel Top to Bottom Toolchain For Generating Virtual Coarse-Grained Reconfigurable Arrays. FPL (2021)
Florian Fricke, Safdar Mahmood, Javier Hoffmann, Marcelo Brandalero, Sascha Liehr, Simon Kern, Klas Meyer, Stefan Kowarik, Stephan Westerdick, Michael Maiwald, Michael Hübner
Artificial Intelligence for Mass Spectrometry and Nuclear Magnetic Resonance Spectroscopy. DATE (2021)
Florian Fricke, André Werner, Keyvan Shahin, Florian Werner, Michael Hübner
Automatic Tool-Flow for Mapping Applications to an Application-Specific CGRA Architecture. IPDPS Workshops (2019)
André Werner, Florian Fricke, Keyvan Shahin, Florian Werner, Michael Hübner
Automatic Toolflow for VCGRA Generation to Enable CGRA Evaluation for Arithmetic Algorithms. ARC (2019)
Alexandra Kourfali, Florian Fricke, Michael Hübner, Dirk Stroobandt
An Integrated on-Silicon Verification Method for FPGA Overlays. J. Electron. Test. 35 (2) (2019)
Florian Fricke, André Werner, Keyvan Shahin, Michael Hübner
CGRA Tool Flow for Fast Run-Time Reconfiguration. ARC (2018)
Amit Kulkarni, Dirk Stroobandt, André Werner, Florian Fricke, Michael Hübner
Pixie: A heterogeneous Virtual Coarse-Grained Reconfigurable Array for high performance image processing applications. CoRR (2017)
Florian Fricke, André Werner, Michael Hübner
Tool flow for automatic generation of architectures and test-cases to enable the evaluation of CGRAs in the context of HPC applications. DASIP (2017)
Jones Yudi Mori, André Werner, Florian Fricke, Michael Hübner
A Rapid Prototyping Method to Reduce the Design Time in Commercial High-Level Synthesis Tools. IPDPS Workshops (2016)
Jones Yudi Mori, André Werner, Arij Shallufa, Florian Fricke, Michael Hübner
A Design Methodology for the Next Generation Real-Time Vision Processors. ARC (2016)
Florian Fricke, André Werner, Benedikt Janßen, Michael Hübner, Clemens Ribbe, Cengizhan Inac
Redesign of an educational robot platform using web-based programming. WESE (2016)