Jose Luis Garcia-Gervacio

Publication Activity (10 Years)

Years Active: 2008-2018
Publications (10 Years): 5

Top Topics

Production Line

Digital Circuits

Defect Detection

Top Venues

IEICE Electron. Express

Microelectron. J.

Publications

Alfonso Herrera-Moreno, Jose Luis Garcia-Gervacio, Héctor Villacorta-Minaya, Héctor Vázquez-Leal
TCAD analysis and modeling for NBTI mechanism in FinFET transistors. IEICE Electron. Express 15 (14) (2018)
Gilberto Domínguez Rodríguez, Jose Luis Garcia-Gervacio, Héctor Vázquez-Leal
Exploring a homotopy approach for the design of nanometer digital circuits tolerant to process variations. IEICE Electron. Express 15 (14) (2018)
Jose Adrian Ruiz Carmona, Julio Cesar Munoz Benitez, Jose Luis Garcia-Gervacio
SCADA system design: A proposal for optimizing a production line. CONIELECOMP (2016)
Hector Villacorta, Jose Luis Garcia-Gervacio, Jaume Segura, Víctor H. Champac
and body bias conditions for testing bridge defects in the presence of process variations. Microelectron. J. 46 (5) (2015)
Jose Luis Garcia-Gervacio, Alejandro Nocua, Víctor H. Champac
Screening small-delay defects using inter-path correlation to reduce reliability risk. Microelectron. Reliab. 55 (6) (2015)
Jose Luis Garcia-Gervacio, Jaime Martínez-Castillo, Víctor H. Champac
Possibilities of defect-size magnification for testing resistive-opens in nanometer technologies. LATW (2014)
Jose Luis Garcia-Gervacio, Agustín Leobardo Herrera-May, Gregorio Zamora-Mejía, Jaime Martínez-Castillo, Alejandro Díaz-Sánchez
Voltage Regulation System for UHF RFID Tags. SBCCI (2013)
Hector Villacorta, Jose Luis Garcia-Gervacio, Víctor H. Champac, Sebastià A. Bota, Jaime Martínez-Castillo, Jaume Segura
Bridge defect detection in nanometer CMOS circuits using Low VDD and body bias. LATW (2013)
Francisco J. Galarza-Medina, Jose Luis Garcia-Gervacio, Víctor H. Champac, Alex Orailoglu
Small-delay defects detection under process variation using Inter-Path Correlation. VTS (2012)
Jose Luis Garcia-Gervacio, Víctor H. Champac
Computing the Detection Probability for Small Delay Defects of Nanometer ICs. J. Electron. Test. 27 (6) (2011)
Jose Luis Garcia-Gervacio, Víctor H. Champac
Computing the detection of Small Delay Defects caused by resistive opens of nanometer ICs. ETS (2010)
Jose Luis Garcia-Gervacio, Víctor H. Champac
Detectability analysis of small delays due to resistive opens considering process variations. IOLTS (2009)
Daniel Iparraguirre-Cardenas, Jose Luis Garcia-Gervacio, Víctor H. Champac
A design methodology for logic paths tolerant to local intra-die variations. ISCAS (2008)