Bridge defect detection in nanometer CMOS circuits using Low VDD and body bias.
Hector VillacortaJose Luis Garcia-GervacioVíctor H. ChampacSebastià A. BotaJaime Martínez-CastilloJaume SeguraPublished in: LATW (2013)
Keyphrases
- defect detection
- analog vlsi
- delay insensitive
- circuit design
- high speed
- vlsi circuits
- feature extraction
- power dissipation
- cmos technology
- human body
- low cost
- floating gate
- low power
- low voltage
- textured surfaces
- focal plane
- chip design
- automated visual inspection
- high levels
- power consumption
- asynchronous circuits
- power reduction
- data sets
- variance reduction
- digital circuits
- analog circuits
- electron microscopy
- mixed signal
- random access memory
- three dimensional
- image processing
- machine learning
- neural network
- flip flops