Hongce Zhang

Publication Activity (10 Years)

Years Active: 2016-2024
Publications (10 Years): 24

Top Topics

Formal Verification

Cognitive Tasks

Top Venues

Publications

Wenji Fang, Mengming Li, Min Li, Zhiyuan Yan, Shang Liu, Hongce Zhang, Zhiyao Xie
AssertLLM: Generating and Evaluating Hardware Verification Assertions from Design Specifications via Multi-LLMs. CoRR (2024)
Wenji Fang, Shang Liu, Hongce Zhang, Zhiyao Xie
Annotating Slack Directly on Your Verilog: Fine-Grained RTL Timing Evaluation for Early Optimization. CoRR (2024)
Guangyu Hu, Jianheng Tang, Changyuan Yu, Wei Zhang, Hongce Zhang
DeepIC3: Guiding IC3 Algorithms by Graph Neural Network Clause Prediction. ASPDAC (2024)
Zhiyuan Yan, Min Li, Zhengyuan Shi, Wenjie Zhang, Yingcong Chen, Hongce Zhang
AsymSAT: Accelerating SAT Solving with Asymmetric Graph-Based Model Prediction. DATE (2024)
Chen Chen, Guangyu Hu, Dongsheng Zuo, Cunxi Yu, Yuzhe Ma, Hongce Zhang
E-Syn: E-Graph Rewriting with Technology-Aware Cost Functions for Logic Synthesis. CoRR (2024)
Wenji Fang, Yao Lu, Shang Liu, Qijun Zhang, Ceyu Xu, Lisa Wu Wills, Hongce Zhang, Zhiyao Xie
MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design. CoRR (2023)
Wenji Fang, Guangyu Hu, Hongce Zhang
r-map: Relating Implementation and Specification in Hardware Refinement Checking. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (12) (2023)
Bo-Yuan Huang, Hongce Zhang, Aarti Gupta, Sharad Malik
INVITED: Generalizing the ISA to the ILA: A Software/Hardware Interface for Accelerator-rich Platforms. DAC (2023)
Wenji Fang, Hongce Zhang
WASIM: A Word-level Abstract Symbolic Simulation Framework for Hardware Formal Verification. TACAS (2) (2023)
Guangyu Hu, Wei Zhang, Hongce Zhang
NeuroPDR: Integrating Neural Networks in the PDR Algorithm for Hardware Model Checking. MLCAD (2023)
Zhiyuan Yan, Min Li, Zhengyuan Shi, Wenjie Zhang, Yingcong Chen, Hongce Zhang
Addressing Variable Dependency in GNN-based SAT Solving. CoRR (2023)
Wenji Fang, Yao Lu, Shang Liu, Qijun Zhang, Ceyu Xu, Lisa Wu Wills, Hongce Zhang, Zhiyao Xie
MasterRTL: A Pre-Synthesis PPA Estimation Framework for Any RTL Design. ICCAD (2023)
Shang Liu, Wenji Fang, Yao Lu, Qijun Zhang, Hongce Zhang, Zhiyao Xie
RTLCoder: Outperforming GPT-3.5 in Design RTL Generation with Our Open-Source Dataset and Lightweight Solution. CoRR (2023)
Hongce Zhang, Aarti Gupta, Sharad Malik
Syntax-Guided Synthesis for Lemma Generation in Hardware Model Checking. VMCAI (2021)
Yu Zeng, Bo-Yuan Huang, Hongce Zhang, Aarti Gupta, Sharad Malik
Generating Architecture-Level Abstractions from RTL Designs for Processors and Accelerators Part I: Determining Architectural State Variables. ICCAD (2021)
Makai Mann, Ahmed Irfan, Florian Lonsing, Yahan Yang, Hongce Zhang, Kristopher Brown, Aarti Gupta, Clark W. Barrett
Pono: A Flexible and Extensible SMT-Based Model Checker. CAV (2) (2021)
Nina Narodytska, Hongce Zhang, Aarti Gupta, Toby Walsh
In Search for a SAT-friendly Binarized Neural Network Architecture. ICLR (2020)
Hongce Zhang, Weikun Yang, Grigory Fedyukovich, Aarti Gupta, Sharad Malik
Synthesizing Environment Invariants for Modular Hardware Verification. VMCAI (2020)
Hongce Zhang, Maxwell Shinn, Aarti Gupta, Arie Gurfinkel, Nham Le, Nina Narodytska
Verification of Recurrent Neural Networks for Cognitive Tasks via Reachability Analysis. ECAI (2020)
Bo-Yuan Huang, Hongce Zhang, Pramod Subramanyan, Yakir Vizel, Aarti Gupta, Sharad Malik
Instruction-Level Abstraction (ILA): A Uniform Specification for System-on-Chip (SoC) Verification. ACM Trans. Design Autom. Electr. Syst. 24 (1) (2019)
Bo-Yuan Huang, Hongce Zhang, Aarti Gupta, Sharad Malik
ILAng: A Modeling and Verification Platform for SoCs Using Instruction-Level Abstractions. TACAS (1) (2019)
Bo-Yuan Huang, Hongce Zhang, Pramod Subramanyan, Yakir Vizel, Aarti Gupta, Sharad Malik
Instruction-Level Abstraction (ILA): A Uniform Specification for System-on-Chip (SoC) Verification. CoRR (2018)
Hongce Zhang, Caroline Trippel, Yatin A. Manerkar, Aarti Gupta, Margaret Martonosi, Sharad Malik
ILA-MCM: Integrating Memory Consistency Models with Instruction-Level Abstractions for Heterogeneous System-on-Chip Verification. FMCAD (2018)
Jangseop Shin, Hongce Zhang, Jinyong Lee, Ingoo Heo, Yu-Yuan Chen, Ruby B. Lee, Yunheung Paek
A hardware-based technique for efficient implicit information flow tracking. ICCAD (2016)