Shibaji Banerjee

Publication Activity (10 Years)

Years Active: 2005-2017
Publications (10 Years): 1

Top Topics

Optimal Selection

Hardware Design

Optimization Procedure

Error Correction

Top Venues

Comput. Electr. Eng.

J. Low Power Electron.

Publications

Shibaji Banerjee, Jimson Mathew
An Optimal Leakage-Aware Approach for Nano-CMOS Post-Physical-Optimization. J. Low Power Electron. 13 (4) (2017)
Jimson Mathew, Saraju P. Mohanty, Shibaji Banerjee, Dhiraj K. Pradhan, Abusaleh M. Jabir
Attack tolerant cryptographic hardware design by combining error correction and uniform switching activity. Comput. Electr. Eng. 39 (4) (2013)
Shibaji Banerjee, Jimson Mathew, Dhiraj K. Pradhan, Saraju P. Mohanty, Maciej J. Ciesielski
Variation-Aware TED-Based Approach for Nano-CMOS RTL Leakage Optimization. VLSI Design (2011)
Shibaji Banerjee, Jimson Mathew, Saraju P. Mohanty, Dhiraj K. Pradhan, Maciej J. Ciesielski
A Variation-Aware Taylor Expansion Diagram-Based Approach for Nano-CMOS Register-Transfer Level Leakage Optimization. J. Low Power Electron. 7 (4) (2011)
Shibaji Banerjee, Jimson Mathew, Dhiraj K. Pradhan, Bhargab B. Bhattacharya, Saraju P. Mohanty
A Routing-Aware ILS Design Technique. IEEE Trans. Very Large Scale Integr. Syst. 19 (12) (2011)
Shibaji Banerjee, Dipanwita Roy Chowdhury, Bhargab B. Bhattacharya
An Efficient Scan Tree Design for Compact Test Pattern Set. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 26 (7) (2007)
Shibaji Banerjee, Dipanwita Roy Chowdhury, Bhargab B. Bhattacharya
An Efficient Scan Tree Design for Compact Test Pattern Set. VLSI Design (2006)
Shibaji Banerjee, Debdeep Mukhopadhyay, C. V. G. Rao, Dipanwita Roy Chowdhury
An integrated DFT solution for mixed-signal SOCs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25 (7) (2006)
Shibaji Banerjee, Dipanwita Roy Chowdhury
Built-In Self-Test for Flash Memory Embedded in SoC. DELTA (2006)
Shibaji Banerjee, Dipanwita Roy Chowdhury, Bhargab B. Bhattacharya
A programmable built-in self-test for embedded DRAMs. MTDT (2005)
Debdeep Mukhopadhyay, Shibaji Banerjee, Dipanwita Roy Chowdhury, Bhargab B. Bhattacharya
CryptoScan: A Secured Scan Chain Architecture. Asian Test Symposium (2005)
Shibaji Banerjee, Debdeep Mukhopadhyay, Dipanwita Roy Chowdhury
Computer Aided Test (CAT) Tool for Mixed Signal SOCs. VLSI Design (2005)