C
search
search
reviewers
reviewers
feeds
feeds
assignments
assignments
settings
logout
Synthesis of LUT Based Approximating Adder Circuits with Formal Error Guarantees.
Pooja Choudhary
Lava Bhargava
Masahiro Fujita
Virendra Singh
Published in:
VDAT (2022)
Keyphrases
</>
logic circuits
analog circuits
logic synthesis
error rate
power dissipation
high speed
error analysis
program synthesis
lower bound
error bounds
formal methods
relative error
formal model
neural network
power consumption
digital images
search algorithm