V. S. Vineesh

Publication Activity (10 Years)

Years Active: 2017-2022
Publications (10 Years): 5

Top Topics

Computation Tree Logic

Security Properties

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Binod Kumar, V. S. Vineesh, Puneet Nemade, Masahiro Fujita
Aries: A Semiformal Technique for Fine-Grained Bug Localization in Hardware Designs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 41 (12) (2022)
V. S. Vineesh, Binod Kumar, Rushikesh Shinde, Neelam Sharma, Masahiro Fujita, Virendra Singh
Enhanced Design Debugging With Assistance From Guidance-Based Model Checking. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (5) (2021)
Binod Kumar, Akshay Kumar Jaiswal, V. S. Vineesh, Rushikesh Shinde
Analyzing Hardware Security Properties of Processors through Model Checking. VLSI Design (2020)
V. S. Vineesh, Binod Kumar, Jay Adhaduk
Identification of Effective Guidance Hints for Better Design Debugging by Formal Methods. VDAT (2019)
V. S. Vineesh, Nihar Hage, B. Karthik, Virendra Singh
Achieving full functional coverage for the forwarding unit of pipelined processors. EWDTS (2017)