Leomar S. da Rosa Jr.

Publication Activity (10 Years)

Years Active: 2003-2023
Publications (10 Years): 13

Top Topics

Design Methodology

Admissible Heuristics

Top Venues

IEEE Trans. Circuits Syst. II Express Briefs

Publications

Tiago R. Balen, Carlos J. González, Ingrid F. V. Oliveira, Leomar S. da Rosa Jr., Rafael Iankowski Soares, Rafael B. Schvittz, Nemitala Added, Eduardo L. A. Macchione, Vitor A. P. Aguiar, Marcilei Aparecida Guazzelli, Nilberto H. Medina, Paulo F. Butzen
Evaluating the Reliability of Different Voting Schemes for Fault Tolerant Approximate Systems. J. Electron. Test. 39 (4) (2023)
Stephano Machado Moreira Goncalves, Leomar S. da Rosa Jr., Felipe S. Marques
SmartDR: Algorithms and Techniques for Fast Detailed Routing with Good Design Rule Handling. ACM Trans. Design Autom. Electr. Syst. 26 (2) (2021)
Stéphano M. M. Gonçalves, Leomar S. da Rosa Jr., Felipe de Souza Marques
DRAPS: A Design Rule Aware Path Search Algorithm for Detailed Routing. IEEE Trans. Circuits Syst. II Express Briefs (7) (2020)
Shubham Rai, Walter Lau Neto, Yukio Miyasaka, Xinpei Zhang, Mingfei Yu, Qingyang Yi, Masahiro Fujita, Guilherme B. Manske, Matheus F. Pontes, Leomar S. da Rosa Jr., Marilton S. de Aguiar, Paulo F. Butzen, Po-Chun Chien, Yu-Shan Huang, Hoa-Ren Wang, Jie-Hong R. Jiang, Jiaqi Gu, Zheng Zhao, Zixuan Jiang, David Z. Pan, Brunno A. Abreu, Isac de Souza Campos, Augusto Andre Souza Berndt, Cristina Meinhardt, Jonata T. Carvalho, Mateus Grellert, Sergio Bampi, Aditya Lohana, Akash Kumar, Wei Zeng, Azadeh Davoodi, Rasit Onur Topaloglu, Yuan Zhou, Jordan Dotzel, Yichi Zhang, Hanyu Wang, Zhiru Zhang, Valerio Tenace, Pierre-Emmanuel Gaillardon, Alan Mishchenko, Satrajit Chatterjee
Logic Synthesis Meets Machine Learning: Trading Exactness for Generalization. CoRR (2020)
Vitor G. Lima, Guilherme Paim, Leandro M. G. Rocha, Leomar S. da Rosa Jr., Felipe S. Marques, Eduardo A. C. da Costa, Vinicius V. Camargo, Rafael Soares, Sergio Bampi
Maximizing Side Channel Attack-Resistance and Energy-Efficiency of the STTL Combining Multi-Vt Transistors with Current and Capacitance Balancing. ISCAS (2019)
Maicon Schneider Cardoso, Gustavo H. Smaniotto, Andrei A. O. Bubolz, Matheus T. Moreira, Leomar S. da Rosa Jr., Felipe de Souza Marques
Libra: An Automatic Design Methodology for CMOS Complex Gates. IEEE Trans. Circuits Syst. II Express Briefs (10) (2018)
Rafael B. Schvittz, Denis Teixeira Franco, Leomar S. da Rosa Jr., Paulo F. Butzen
Probabilistic Method for Reliability Estimation of SP- Networks considering Single Event Transient Faults. ICECS (2018)
Maicon Schneider Cardoso, Gustavo H. Smaniotto, Andrei A. O. Bubolz, Leomar S. da Rosa Jr., Felipe S. Marques
Area-Aware Design of Static CMOS Complex Gates. NEWCAS (2018)
Gustavo H. Smaniotto, Regis Zanandrea, Maicon Schneider Cardoso, Renato Souza de Souza, Matheus T. Moreira, Felipe S. Marques, Leomar S. da Rosa Jr.
A post-processing methodology to improve the automatic design of CMOS gates at layout-level. ICECS (2017)
Stephano Machado Moreira Goncalves, Leomar S. da Rosa Jr., Felipe de Souza Marques
A survey of path search algorithms for VLSI detailed routing. ISCAS (2017)
Vinicius N. Possani, André Inácio Reis, Renato P. Ribas, Felipe S. Marques, Leomar S. da Rosa Jr.
Transistor Count Optimization in IG FinFET Network Design. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (9) (2017)
Gustavo H. Smaniotto, Regis Zanandrea, Maicon Schneider Cardoso, Renato Souza de Souza, Matheus T. Moreira, Felipe S. Marques, Leomar S. da Rosa Jr.
Post-processing of supergate networks aiming cell layout optimization. ISCAS (2017)
Gustavo H. Smaniotto, Joao J. da S. Machado, Matheus T. Moreira, Adriel Mota Ziesemer, Felipe S. Marques, Leomar S. da Rosa Jr.
Optimizing cell area by applying an alternative transistor folding technique in an open source physical synthesis CAD tool. LASCAS (2016)
Vinicius N. Possani, Vinicius Callegaro, André Inácio Reis, Renato P. Ribas, Felipe S. Marques, Leomar S. da Rosa Jr.
Improving the methodology to build non-series-parallel transistor arrangements. SBCCI (2013)
Vinicius N. Possani, Felipe S. Marques, Leomar S. da Rosa Jr., Vinicius Callegaro, André Inácio Reis, Renato P. Ribas
Transistor-level optimization of CMOS complex gates. LASCAS (2013)
Vinicius N. Possani, Felipe S. Marques, Leomar S. da Rosa Jr., Vinicius Callegaro, André Inácio Reis, Renato P. Ribas
NSP kernel finder - A methodology to find and to build non-series-parallel transistor arrangements. SBCCI (2012)
Mayler G. A. Martins, Leomar S. da Rosa Jr., Anders B. Rasmussen, Renato P. Ribas, André Inácio Reis
Boolean factoring with multi-objective goals. ICCD (2010)
Paulo F. Butzen, Leomar S. da Rosa Jr., Erasmo J. D. Chiappetta Filho, André Inácio Reis, Renato P. Ribas
Standby power consumption estimation by interacting leakage current mechanisms in nanoscaled CMOS digital circuits. Microelectron. J. 41 (4) (2010)
Leomar S. da Rosa Jr., Felipe Ribeiro Schneider, Renato P. Ribas, André Inácio Reis
Switch level optimization of digital CMOS gate networks. ISQED (2009)
Tiago Muller Gil Cardoso, Leomar S. da Rosa Jr., Felipe de Souza Marques, Renato P. Ribas, André Inácio Reis
Speed-Up of ASICs Derived from FPGAs by Transistor Network Synthesis Including Reordering. ISQED (2008)
Paulo F. Butzen, Leomar S. da Rosa Jr., Erasmo J. D. Chiappetta Filho, Dionatan S. Moura, André Inácio Reis, Renato P. Ribas
Simple and accurate method for fast static currentestimation in cmos complex gates with interaction ofleakage mechanisms. ACM Great Lakes Symposium on VLSI (2008)
Leomar S. da Rosa Jr., André Inácio Reis, Renato P. Ribas, Felipe de Souza Marques, Felipe Ribeiro Schneider
A comparative study of CMOS gates with minimum transistor stacks. SBCCI (2007)
Felipe S. Marques, Leomar S. da Rosa Jr., Renato P. Ribas, Sachin S. Sapatnekar, André Inácio Reis
DAG based library-free technology mapping. ACM Great Lakes Symposium on VLSI (2007)
Leomar S. da Rosa Jr., Felipe S. Marques, Tiago Muller Gil Cardoso, Renato P. Ribas, Sachin S. Sapatnekar, André Inácio Reis
Fast disjoint transistor networks from BDDs. SBCCI (2006)
Leomar S. da Rosa Jr., Flávio Rech Wagner, Luigi Carro, Alexandre Carissimi, André Inácio Reis
Scheduling Policy Costs on a JAVA Microcontroller. OTM Workshops (2003)