Login / Signup
Switch level optimization of digital CMOS gate networks.
Leomar S. da Rosa Jr.
Felipe Ribeiro Schneider
Renato P. Ribas
André Inácio Reis
Published in:
ISQED (2009)
Keyphrases
</>
high speed
circuit design
neural network
cmos technology
network structure
global optimization
social networks
constrained optimization
network analysis
optimization problems
complex networks
low power
optimization method
higher level
optimization model
power supply
multi objective
cmos image sensor