Speed-Up of ASICs Derived from FPGAs by Transistor Network Synthesis Including Reordering.
Tiago Muller Gil CardosoLeomar S. da Rosa Jr.Felipe de Souza MarquesRenato P. RibasAndré Inácio ReisPublished in: ISQED (2008)
Keyphrases
- high speed
- field programmable gate array
- peer to peer
- network structure
- network model
- network topologies
- complex networks
- computer networks
- network architecture
- data flow
- link prediction
- hardware software
- distributed network
- digital signal processing
- network design
- texture synthesis
- integrated circuit
- database
- communication networks
- signal processing
- general purpose
- wireless sensor networks
- neural network
- data sets