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Effective FPGA Resource Utilization for Quasi Delay Insensitive Implementation of Asynchronous Circuits.
Yi-Fan Evan Chang
Ruei-Yang Huang
Jie-Hong R. Jiang
Published in:
ASYNC (2019)
Keyphrases
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asynchronous circuits
delay insensitive
resource utilization
hardware implementation
model checking
low cost
high speed
load balancing
low power
virtual machine
resource management
distributed systems
sensor networks
quality of service
computer networks
network resources