Gain Kim

Publication Activity (10 Years)

Years Active: 2015-2024
Publications (10 Years): 27

Top Topics

Requirement Analysis

Convolutional Neural Network

Design Space Exploration

Top Venues

IEEE Trans. Circuits Syst. II Express Briefs

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Jaehyun Lee, Dong-gu Choi, Minyoung Song, Gain Kim, Jong-Hyeok Yoon
BEE-SLAM: A 65nm 17.96 TOPS/W 97.55%-Sparse-Activity Hybrid Mixed-Signal/Digital Multi-Agent Neuromorphic SLAM Accelerator for Swarm Robotics. CICC (2024)
Jaewon Lee, Seoyoung Jang, Yujin Choi, Donggeon Kim, Serdar A. Yonar, Matthias Braendli, Andrea Ruffino, Thomas Morf, Marcel A. Kossel, Pier Andrea Francese, Gain Kim
A DAC/ADC-Based Wireline Transceiver Datapath Functional Verification on RFSoC Platform. IEEE Trans. Circuits Syst. II Express Briefs 71 (7) (2024)
Seoyoung Jang, Jaewon Lee, Yujin Choi, Donggeon Kim, Gain Kim
DMT 3L4W: A 3-Lane 4-Wire Signaling With Discrete Multitone Modulation for High-Speed Wireline Chip-to-Chip Interconnects. ISCAS (2024)
Seoyoung Jang, Jaewon Lee, Gain Kim
A Study on the Effects of Power Loading Profile in Discrete Multitone Wireline Serial-Data Transceiver with Fixed-Point DSP-SerDes Simulator. ICEIC (2024)
Woohyun Kwon, Hyosup Won, Taeho Kim, Sejun Jeon, Soon-Won Kwon, Ha-Il Song, Hanho Choi, Bongjin Kim, Huxian Jin, Jun-Gi Jo, Woosang Han, Tai-Young Kim, Gain Kim, Jake Eu, Jinho Park, Hyeon-Min Bae
A 26-Gb/s Framed-Pulsewidth Modulation Transceiver for Extended Reach Optical Links. IEEE J. Solid State Circuits 59 (8) (2024)
Jaewon Lee, Seoyoung Jang, Yujin Choi, Donggeon Kim, Matthias Braendli, Marcel A. Kossel, Andrea Ruffino, Thomas Morf, Pier Andrea Francese, Gain Kim
A 4×4 MIMO Discrete Multitone Wireline Transceiver With Far-End Crosstalk Cancellation For ADC-Based High-Speed Serial Links. ISCAS (2024)
Myungguk Lee, Jaeik Cho, Junung Choi, Won Joon Choi, Jiyun Lee, Iksu Jang, Changjae Moon, Gain Kim, Byungsub Kim
Compact Single-Ended Transceivers Demonstrating Flexible Generation of 1/N-Rate Receiver Front-Ends for Short-Reach Links. IEEE Trans. Circuits Syst. I Regul. Pap. 71 (1) (2024)
Yujin Choi, Seoyoung Jang, Gain Kim
Area Optimization of the Feed-Forward Equalizer for ADC-Based High-Speed Wireline Receiver Using Channel Characteristics. ICEIC (2024)
Hanho Choi, Ha-Il Song, Hyosup Won, Jun Young Yoo, Woohyun Kwon, Huxian Jin, Konan Kwon, Cheong Min Lee, Gain Kim, Jake Eu, Sean Park, Hyeon-Min Bae
An 86.71875GHz RF transceiver for 57.8125Gb/s waveguide links with a CDR-assisted carrier synchronization loop in 28nm. ESSCIRC (2023)
Gain Kim
Far-End Crosstalk Cancellation With MIMO OFDM for >200 Gb/s ADC-Based Serial Links. IEEE Trans. Circuits Syst. II Express Briefs 70 (1) (2023)
Reza Ranjandish, Gain Kim
Does Charge Balancing Ensure the Safety of the Electrical Stimulation and Is It Power Efficientƒ. EMBC (2023)
Geunha Kim, Sehwan Lee, Taeryoung Seol, Seungyeob Baik, Yeonjae Shin, Gain Kim, Jong-Hyeok Yoon, Arup K. George, Junghyup Lee
-Order Noise-Shaping SAR-ADC with Enhanced Input Impedance in 0.18μm CMOS. ISSCC (2023)
Jinho Park, Jaewon Lee, Gain Kim, Hyeon-Min Bae
Bin-Specific Quantization in Spectral-Domain Convolutional Neural Network Accelerators. AICAS (2022)
Gain Kim
Design Space Exploration of Single-Lane OFDM-Based Serial Links for High-Speed Wireline Communications. IEEE Open J. Circuits Syst. 3 (2022)
Jaewon Lee, Gain Kim, Jinho Park, Hyeon-Min Bae
Link Bit-Error-Rate Requirement Analysis for Deep Neural Network Accelerators. ISCAS (2021)
Gain Kim, Marcel A. Kossel, Alessandro Cevrero, Ilter Özkaya, Andreas Burg, Thomas Toifl, Yusuf Leblebici, Lukas Kull, Danny Luu, Matthias Braendli, Christian Menolfi, Pier Andrea Francese, Hazar Yueksel, Cosimo Aprile, Thomas Morf
A 161-mW 56-Gb/s ADC-Based Discrete Multitone Wireline Receiver Data-Path in 14-nm FinFET. IEEE J. Solid State Circuits 55 (1) (2020)
Gain Kim, Lukas Kull, Danny Luu, Matthias Braendli, Christian Menolfi, Pier Andrea Francese, Hazar Yueksel, Cosimo Aprile, Thomas Morf, Marcel A. Kossel, Alessandro Cevrero, Ilter Özkaya, Andreas Burg, Thomas Toifl, Yusuf Leblebici
A 161mW 56Gb/s ADC-Based Discrete Multitone Wireline Receiver Data-Path in 14nm FinFET. ISSCC (2019)
Gain Kim, Lukas Kull, Danny Luu, Matthias Braendli, Christian Menolfi, Pier Andrea Francese, Hazar Yueksel, Cosimo Aprile, Thomas Morf, Marcel A. Kossel, Alessandro Cevrero, Ilter Özkaya, Hyeon-Min Bae, Andreas Burg, Thomas Toifl, Yusuf Leblebici
A 4.8pJ/b 56Gb/s ADC-Based PAM-4 Wireline Receiver Data-Path with Cyclic Prefix in 14nm FinFET. A-SSCC (2019)
Gain Kim, Woohyun Kwon, Thomas Toifl, Yusuf Leblebici, Hyeon-Min Bae
Design Considerations and Performance Trade-Offs for 56Gb/s Discrete Multi-Tone Electrical Link. MWSCAS (2019)
Kyong Hwan Jin, Gain Kim, Yusuf Leblebici, Jong Chul Ye, Michael Unser
Direct Reconstruction of Saturated Samples in Band-Limited OFDM Signals. CoRR (2018)
Gain Kim, Lukas Kull, Danny Luu, Matthias Braendli, Christian Menolfi, Pier Andrea Francese, Cosimo Aprile, Thomas Morf, Marcel A. Kossel, Alessandro Cevrero, Ilter Özkaya, Thomas Toifl, Yusuf Leblebici
Parallel Implementation Technique of Digital Equalizer for Ultra-High-Speed Wireline Receiver. ISCAS (2018)
Gain Kim, Thierry Barailler, Chen Cao, Kiarash Gharibdoust, Yusuf Leblebici
Design and Modeling of Serial Data Transceiver Architecture by Employing Multi-Tone Single-Sideband Signaling Scheme. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2017)
Gain Kim, Chen Cao, Kiarash Gharibdoust, Armin Tajalli, Yusuf Leblebici
A Time-Division Multiplexing Signaling Scheme for Inter-Symbol/Channel Interference Reduction in Low-Power Multi-Drop Memory Links. IEEE Trans. Circuits Syst. II Express Briefs (12) (2017)
Kiarash Gharibdoust, Gain Kim, Armin Tajalli, Yusuf Leblebici
A fully-digital spectrum shaping signaling for serial-data transceiver with crosstalk and ISI reduction property in multi-drop memory interfaces. ISCAS (2016)
Xifan Tang, Gain Kim, Pierre-Emmanuel Gaillardon, Giovanni De Micheli
A Study on the Programming Structures for RRAM-Based FPGA Architectures. IEEE Trans. Circuits Syst. I Regul. Pap. (4) (2016)
Gain Kim, Kiarash Gharibdoust, Armin Tajalli, Yusuf Leblebici
A Digital Spectrum Shaping Signaling Serial-Data Transceiver With Crosstalk and ISI Reduction Property in Multidrop Interfaces. IEEE Trans. Circuits Syst. II Express Briefs (12) (2016)
Gain Kim, Yusuf Leblebici
Architectural modeling of a multi-tone/single-sideband serial link transceiver for lossy wireline data links. APCCAS (2016)
Gain Kim, Raffaele Capoccia, Yusuf Leblebici
Design optimization of polyphase digital down converters for extremely high frequency wireless communications. VLSI-SoC (2015)
Pierre-Emmanuel Gaillardon, Gain Kim, Xifan Tang, Luca Gaetano Amarù, Giovanni De Micheli
Towards More Efficient Logic Blocks By Exploiting Biconditional Expansion (Abstract Only). FPGA (2015)
Pierre-Emmanuel Gaillardon, Xifan Tang, Gain Kim, Giovanni De Micheli
A Novel FPGA Architecture Based on Ultrafine Grain Reconfigurable Logic Cells. IEEE Trans. Very Large Scale Integr. Syst. 23 (10) (2015)