Byungsub Kim

ORCID

Publication Activity (10 Years)

Years Active: 2001-2024
Publications (10 Years): 67

Top Venues

ISSCC

IEEE J. Solid State Circuits

IEEE Trans. Circuits Syst. I Regul. Pap.

IEEE Trans. Circuits Syst. II Express Briefs

Massachusetts Institute of Technology, Cambridge, MA, USA (PHD)

Education History

Massachusetts Institute of Technology, Cambridge, MA, USA

PHD

Publications

Myungguk Lee, Jaeik Cho, Junung Choi, Won Joon Choi, Jiyun Lee, Iksu Jang, Changjae Moon, Gain Kim, Byungsub Kim
Compact Single-Ended Transceivers Demonstrating Flexible Generation of 1/N-Rate Receiver Front-Ends for Short-Reach Links. IEEE Trans. Circuits Syst. I Regul. Pap. 71 (1) (2024)
Kwangmin Kim, Hyoseok Song, Byeongcheol Lee, Byungsub Kim
A Speculative Divide-and-Conquer Optimization Method for Large Analog/Mixed-Signal Circuits: A High-Speed FFE SST Transmitter Example. IEEE Trans. Very Large Scale Integr. Syst. 31 (5) (2023)
Jaeyoung Seo, Sooeun Lee, Myungguk Lee, Changjae Moon, Byungsub Kim
A 20-Gb/s/Pin Compact Single-Ended DCC-Less DECS Transceiver With CDR-Less RX Front-End for On-Chip Links. IEEE J. Solid State Circuits 58 (11) (2023)
Hyoseok Song, Kwangmin Kim, Changyoon Han, Byungsub Kim
Review: A Speculative Divide-and-Conquer Optimization Method for Large Analog/Mixed-Signal Circuits. ISOCC (2023)
Iksu Jang, Jaeyoung Seo, Changjae Moon, Byungsub Kim
A Cost-efficient FPGA-based Embedded System for Biosensor Platform. ISOCC (2022)
Myungguk Lee, Puneet Kanwar Kaur, Jaeyoung Seo, Seungho Han, Byungsub Kim
A Compact Single-Ended Inverter-Based Transceiver With Swing Improvement for Short-Reach Links. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (9) (2022)
Hyoseok Song, Kwangmin Kim, Changyoon Han, Byungsub Kim
A Fast Eye Size Evaluation Method for High Speed Signal. ISOCC (2022)
Seungsik Moon, Jaehyun Ko, Byungsub Kim, Youngjoo Lee
A Study On Reliable High-Speed HBC Enhanced by ECC for Wearable Neural Interfaces. AICAS (2022)
Changjae Moon, Jaeyoung Seo, Myungguk Lee, Iksu Jang, Byungsub Kim
Single-Ended Inverter-based 4-tap Addition-Only Feed-Forward Equalization Transmitter with Improved Robustness to Coefficient Errors in 28nm CMOS. ISSCC (2022)
Jaeyoung Seo, Sooeun Lee, Myungguk Lee, Changjae Moon, Byungsub Kim
Single-Ended DECS TRX with CDR-less Self-Slicing/Auto-Deserialization to Improve Tolerance on Duty Cycle Error and RX Supply Noise for DCC/CDR-less Short-Reach Memory Interfaces. ISSCC (2022)
Junung Choi, Jaeik Cho, Won Joon Choi, Myungguk Lee, Byungsub Kim
A Layout Generator of Latch, Flip-Flop, and Shift Register for High-Speed Links. ISOCC (2022)
Jaehyun Ko, Iksu Jang, Chanho Kim, Jihoon Park, Changjae Moon, Sooeun Lee, Byungsub Kim
A 50 Mb/s Full HBC TRX with Adaptive DFE and Variable-Interval 3x Oversampling CDR in 28nm CMOS Technology for A 75 cm Body Channel Moving at 0.75 Cycle/sec. ESSCIRC (2022)
Soo-Bong Cho, Seung-Kook Ro, Byungsub Kim, Sungcheul Lee, Jong-Kweon Park
The development of a micro-pattern manufacturing method using rotating active tools with compensation of estimated errors and an LMS algorithm. J. Intell. Manuf. 32 (1) (2021)
Sooeun Lee, Jaeyoung Seo, Changyoon Han, Jae-Yoon Sim, Hong-June Park, Byungsub Kim
A DFE-Enhanced Phase-Difference Modulation Signaling for Multi-Drop Memory Interfaces. IEEE Trans. Circuits Syst. II Express Briefs 68 (6) (2021)
Jaeyoung Seo, Jaehyun Ko, Kyunghyun Lim, Sooeun Lee, Jae-Yoon Sim, Hong-June Park, Byungsub Kim
A 7.8-Gb/s 2.9-pJ/b Single-Ended Receiver With 20-Tap DFE for Highly Reflective Channels. IEEE Trans. Very Large Scale Integr. Syst. 28 (3) (2020)
Seong-Eun Cho, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
Low-Power Small-Area Inverter-Based DSM for MEMS Microphone. IEEE Trans. Circuits Syst. (11) (2020)
Seungho Han, Sungyu Jeong, Chanho Kim, Hong-June Park, Byungsub Kim
GUI-Enhanced Layout Generation of FFE SST TXs for Fast High-Speed Serial Link Design. DAC (2020)
Jaehyeong Hong, Dong Hoon Baek, Hyunwoo Son, Cheolmin Ahn, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
A pattern-dependent injection-locked CDR for clock-embedded signaling. Microelectron. J. 96 (2020)
Sooeun Lee, Jaeyoung Seo, Kyunghyun Lim, Jahyun Koo, Jae-Yoon Sim, Hong-June Park, Byungsub Kim
A 7.8 Gb/s/pin, 1.96 pJ/b Transceiver With Phase-Difference-Modulation Signaling for Highly Reflective Interconnects. IEEE Trans. Circuits Syst. I Regul. Pap. (6) (2020)
Cheolmin Ahn, Jaehyeong Hong, Jongshin Shin, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
An 18-Gb/s NRZ Transceiver With a Channel-Included 2-UI Impulse-Response Filtering FFE and 1-Tap DFE Compensating up to 32-dB Loss. IEEE Trans. Circuits Syst. (12) (2020)
Ji-Hoon Lee, Jaehyun Ko, Kwangmin Kim, Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim
A Body Channel Communication Technique Utilizing Decision Feedback Equalization. IEEE Access 8 (2020)
Youngwoo Ji, Jungho Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
A 192-pW Voltage Reference Generating Bandgap- $V_{\text{th}}$ With Process and Temperature Dependence Compensation. IEEE J. Solid State Circuits 54 (12) (2019)
Kwangmin Kim, Seokjoon Kang, Byungsub Kim
A Code Inversion Encoding Technique to Improve Read Margin of A Cross-Point Phase Change Memory. IEEE Trans. Very Large Scale Integr. Syst. 27 (8) (2019)
Hyunwoo Son, Hwasuk Cho, Jungho Lee, Seongun Bae, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
A Multilayer-Learning Current-Mode Neuromorphic System With Analog-Error Compensation. IEEE Trans. Biomed. Circuits Syst. 13 (5) (2019)
Cheonhoo Jeon, Jahyun Koo, Kyongsu Lee, Su-Kyoung Kim, Sei Kwang Hahn, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
A 143nW Glucose-Monitoring Smart Contact Lens IC with a Dual-Mode Transmitter for Wireless-Powered Backscattering and RF-Radiated Transmission Using a Single Loop Antenna. VLSI Circuits (2019)
Youngwoo Ji, Jungho Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
A 192pW Hybrid Bandgap-Vth Reference with Process Dependence Compensated by a Dimension-Induced Side-Effect. ISSCC (2019)
Jahyun Koo, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
A Quadrature RC Oscillator With Noise Reduction by Voltage Swing Control. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2019)
Sooeun Lee, Jaeyoung Seo, Kyunghyun Lim, Jaehyun Ko, Jae-Yoon Sim, Hong-June Park, Byungsub Kim
A 7.8Gb/s/pin 1.96pJ/b compact single-ended TRX and CDR with phase-difference modulation for highly reflective memory interfaces. ISSCC (2018)
Kyunghyun Lim, Minsoo Choi, Myat Thu Linn Aung, Kyunghwan Kim, Ji-Seong Kim, Rock-Hyun Baek, Ho-Jin Song, Tony Tae-Hyoung Kim, Byungsub Kim
Experimental Verification of a Simple, Intuitive, and Accurate Closed-Form Transfer Function Model for Diverse High-Speed Interconnects. ISOCC (2018)
Youngwoo Ji, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
A Study on Bandgap Reference Circuit With Leakage-Based PTAT Generation. IEEE Trans. Very Large Scale Integr. Syst. 26 (11) (2018)
Minsoo Choi, Sooeun Lee, Myungguk Lee, Ji-Hoon Lee, Jae-Yoon Sim, Hong-June Park, Byungsub Kim
An FFE Transmitter Which Automatically and Adaptively Relaxes Impedance Matching. IEEE J. Solid State Circuits 53 (6) (2018)
Hyunwoo Son, Hwasuk Cho, Jahyun Koo, Youngwoo Ji, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
A low-power wide dynamic-range current readout circuit for biosensors. ASP-DAC (2018)
Ji-Hoon Lee, Kwangmin Kim, Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim
200x area efficiency. ASP-DAC (2018)
Minsoo Choi, Myungguk Lee, Byungsub Kim
A 12-Gb/s AC-Coupled FFE TX With Adaptive Relaxed Impedance Matching Achieving Adaptation Range of 35-75Ω Z0 and 30-550Ω RRX. A-SSCC (2018)
Youngwoo Ji, Cheonhoo Jeon, Hyunwoo Son, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
A 9.3 nW all-in-one bandgap voltage and current reference circuit using leakage-based PTAT generation and DIBL characteristic. ASP-DAC (2018)
Kwangmin Kim, Seokjoon Kang, Jae-Yoon Sim, Hong-June Park, Byungsub Kim
A Search Algorithm for the Worst Operation Scenario of a Cross-Point Phase-Change Memory Utilizing Particle Swarm Optimization. IEEE Trans. Very Large Scale Integr. Syst. 26 (12) (2018)
Jaeyoung Seo, Minsoo Choi, Byungsub Kim
An Approximate Closed-Form Transfer Function Model for Multiconductor Transmission Lines. IEEE Trans. Circuits Syst. II Express Briefs (9) (2018)
Minseob Lee, Shinwoong Kim, Hwasuk Cho, Jahyun Koo, Kwang-Hee Choi, Jin-Hyeok Choi, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
A 0.3-to-1.2V frequency-scalable fractional-N ADPLL with a speculative dual-referenced interpolating TDC. ISSCC (2018)
Seungnam Choi, Hwan-Seok Ku, Hyunwoo Son, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
An 84.6-dB-SNDR and 98.2-dB-SFDR Residue-Integrated SAR ADC for Low-Power Sensor Applications. IEEE J. Solid State Circuits 53 (2) (2018)
Yelim Youn, Kwangmin Kim, Byungsub Kim
A Rule-of-thumb Condition to Avoid Large HRS Current in ReRAM Crossbar Array Design. ISOCC (2018)
Hwasuk Cho, Hyunwoo Son, Kihwan Seong, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
An On-Chip Learning Neuromorphic Autoencoder With Current-Mode Transposable Memory Read and Virtual Lookup Table. IEEE Trans. Biomed. Circuits Syst. 12 (1) (2018)
Il-Min Yi, Min-Kyun Chae, Seok-Hun Hyun, Seung-Jun Bae, Jung-Hwan Choi, Seong-Jin Jang, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
A Time-Based Receiver With 2-Tap Decision Feedback Equalizer for Single-Ended Mobile DRAM Interface. IEEE J. Solid State Circuits 53 (1) (2018)
Jahyun Koo, Kyoung-Sik Moon, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
5.5 A quadrature relaxation oscillator with a process-induced frequency-error compensation loop. ISSCC (2017)
Seunghwan Hong, Shinwoong Kim, Seungnam Choi, Hwasuk Cho, Jaehyeong Hong, Young Hun Seo, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
A 250-µW 2.4-GHz Fast-Lock Fractional-N Frequency Generation for Ultralow-Power Applications. IEEE Trans. Circuits Syst. II Express Briefs (2) (2017)
Myungguk Lee, Seungho Han, Jae-Yoon Sim, Hong-June Park, Byungsub Kim
A 10-GHz multi-purpose reconfigurable built-in self-test circuit for high-speed links. A-SSCC (2017)
JaeHyun Seo, Sangheon Lee, Kwangmin Kim, Sooeun Lee, Hyunsang Hwang, Byungsub Kim
Automatic ReRAM SPICE Model Generation From Empirical Data for Fast ReRAM-Circuit Coevaluation. IEEE Trans. Very Large Scale Integr. Syst. 25 (6) (2017)
Young-Ho Choi, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
A Phase-Interpolator-Based Fractional Counter for All-Digital Fractional-N Phase-Locked Loop. IEEE Trans. Circuits Syst. II Express Briefs (3) (2017)
Il-Min Yi, Min-Kyun Chae, Seok-Hun Hyun, Seung-Jun Bae, Jung-Hwan Choi, Seong-Jin Jang, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
23.7 A time-based receiver with 2-tap DFE for a 12Gb/s/pin single-ended transceiver of mobile DRAM interface in 0.8V 65nm CMOS. ISSCC (2017)
Hyunwoo Son, Hwasuk Cho, Jahyun Koo, Youngwoo Ji, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
A Low-Power Wide Dynamic-Range Current Readout Circuit for Ion-Sensitive FET Sensors. IEEE Trans. Biomed. Circuits Syst. 11 (3) (2017)
Yelim Youn, Kwangmin Kim, Jae-Yoon Sim, Hong-June Park, Byungsub Kim
Investigation on the Worst Read Scenario of a ReRAM Crossbar Array. IEEE Trans. Very Large Scale Integr. Syst. 25 (9) (2017)
Hwasuk Cho, Kihwan Seong, Kwang-Hee Choi, Jin-Hyeok Choi, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
highly synthesizable TDC- and DCO-less fractional-N PLL with a seamless lock range of fREF to 1GHz. ISSCC (2017)
Yoon-Jee Kim, Sung-Eun Cho, Ji-Yong Um, Min-Kyun Chae, Jihoon Bang, Jongkeun Song, Taeho Jeon, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
A Single-Chip 64-Channel Ultrasound RX-Beamformer Including Analog Front-End and an LUT for Non-Uniform ADC-Sample-Clock Generation. IEEE Trans. Biomed. Circuits Syst. 11 (1) (2017)
Youngwoo Ji, Cheonhoo Jeon, Hyunwoo Son, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
5.8 A 9.3nW all-in-one bandgap voltage and current reference circuit. ISSCC (2017)
Jaeyoung Seo, Minsoo Choi, Sanquan Song, Jae-Yoon Sim, Hong-June Park, Byungsub Kim
An Approximate Transfer Function Model of Two Serially Connected Heterogeneous Transmission Lines. IEEE Trans. Circuits Syst. II Express Briefs (9) (2017)
Kihwan Seong, Won-Cheol Lee, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
All-Synthesizable Current-Mode Transmitter Driver for USB2.0 Interface. IEEE Trans. Very Large Scale Integr. Syst. 25 (2) (2017)
Seungnam Choi, Yunjae Suh, Joohyun Lee, Jinkyu Kim, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
A Self-Biased Current-Mode Amplifier With an Application to 10-bit Pipeline ADC. IEEE Trans. Circuits Syst. I Regul. Pap. (7) (2017)
Seungho Han, Sooeun Lee, Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim
A Coefficient-Error-Robust Feed-Forward Equalizing Transmitter for Eye-Variation and Power Improvement. IEEE J. Solid State Circuits 51 (8) (2016)
Young-Ho Choi, Kihwan Seong, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
All-synthesizable 6Gbps voltage-mode transmitter for serial link. A-SSCC (2016)
Kihwan Seong, Won-Cheol Lee, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
All-synthesizable transmitter driver and data recovery circuit for USB2.0 interface. ISOCC (2016)
Ji-Hoon Lim, Jun-Hyun Bae, Jaemin Jang, Hae-Kang Jung, Hyunbae Lee, Yongju Kim, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
A Delay Locked Loop With a Feedback Edge Combiner of Duty-Cycle Corrector With a 20%-80% Input Duty Cycle for SDRAMs. IEEE Trans. Circuits Syst. II Express Briefs (2) (2016)
Il-Min Yi, Seung-Jun Bae, Min-Kyun Chae, Soo-Min Lee, Young Jae Jang, Young-Chul Cho, Young-Soo Sohn, Jung-Hwan Choi, Seong-Jin Jang, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
A low-EMI four-bit four-wire single-ended DRAM interface by using a three-level balanced coding scheme. VLSI Circuits (2016)
Seungnam Choi, Hyunwoo Son, Jongshin Shin, Sang-Hyun Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
A 0.65-to-10.5 Gb/s Reference-Less CDR With Asynchronous Baud-Rate Sampling for Frequency Acquisition and Adaptive Equalization. IEEE Trans. Circuits Syst. I Regul. Pap. (2) (2016)
Young Jae Jang, Seong-Eun Cho, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
A low-power LDO circuit with a fast load regulation. APCCAS (2016)
Shinwoong Kim, Seunghwan Hong, Kapseok Chang, Hyungsik Ju, Jaewook Shin, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
A 2 GHz Synthesized Fractional-N ADPLL With Dual-Referenced Interpolating TDC. IEEE J. Solid State Circuits 51 (2) (2016)
JaeHyun Seo, Byungsub Kim
Read margin analysis in an ReRAM crossbar array. APCCAS (2016)
Il-Min Yi, Soo-Min Lee, Seung-Jun Bae, Young-Soo Sohn, Jung-Hwan Choi, Seong-Jin Jang, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
A 40 mV-Differential-Channel-Swing Transceiver Using a RX Current-Integrating TIA and a TX Pre-Emphasis Equalizer With a CML Driver at 9 Gb/s. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2016)
Soo-Min Lee, Ji-Hoon Lim, Il-Min Yi, Young Jae Jang, Hae-Kang Jung, Kyunghoon Kim, Dae-Han Kwon, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
A Single-Ended Parallel Transceiver With Four-Bit Four-Wire Four-Level Balanced Coding for the Point-to-Point DRAM Interface. IEEE J. Solid State Circuits 51 (8) (2016)
Jongmi Lee, Youngwoo Ji, Seungnam Choi, Young-Chul Cho, Seong-Jin Jang, Joo-Sun Choi, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
5.7 A 29nW bandgap reference circuit. ISSCC (2015)
Sooeun Lee, Gunbok Lee, Jae-Yoon Sim, Hong-June Park, Wee Sang Park, Byungsub Kim
A Sample Reduction Technique by Aliasing Channel Response for Fast Equalizing Transceiver Design. ICCAD (2015)
Ji-Yong Um, Yoon-Jee Kim, Seong-Eun Cho, Min-Kyun Chae, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
A Single-Chip 32-Channel Analog Beamformer With 4-ns Delay Resolution and 768-ns Maximum Delay Range for Ultrasound Medical Imaging With a Linear Array Transducer. IEEE Trans. Biomed. Circuits Syst. 9 (1) (2015)
Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim
An Approximate Closed-Form Transfer Function Model for Diverse Differential Interconnects. IEEE Trans. Circuits Syst. I Regul. Pap. (5) (2015)
Sanquan Song, Jian Xu, Fengxiang Cai, Xin Ma, Zibing Yang, Matthew Becker, Larry Tate, Byungsub Kim, Samuel Palermo, William J. Bowhill
An input pole tuned switching equalization scheme for high-speed serial links. MWSCAS (2015)
Dong Hoon Baek, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
2.6 A 5.67mW 9Gb/s DLL-based reference-less CDR with pattern-dependent clock-embedded signaling for intra-panel interface. ISSCC (2014)
Hyunsoo Ha, Seon-Kyoo Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
A 0.5-V, 1.47- µW 40-kS/s 13-bit SAR ADC With Capacitor Error Compensation. IEEE Trans. Circuits Syst. II Express Briefs (11) (2014)
Ji-Yong Um, Eun-Woo Song, Yoon-Jee Kim, Seong-Eun Cho, Min-Kyun Chae, Jongkeun Song, Bae-Hyung Kim, Seunghun Lee, Jihoon Bang, Youngil Kim, Kyungil Cho, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
24.8 An analog-digital-hybrid single-chip RX beamformer with non-uniform sampling for 2D-CMUT ultrasound imaging to achieve wide dynamic range of delay and small chip area. ISSCC (2014)
Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim
An Approximate Closed-Form Channel Model for Diverse Interconnect Applications. IEEE Trans. Circuits Syst. I Regul. Pap. (10) (2014)
Il-Min Yi, Soo-Min Lee, Seung-Jun Bae, Young-Soo Sohn, Jung-Hwan Choi, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
A 40-mV-Swing Single-Ended Transceiver for TSV with a Switched-Diode RX Termination. IEEE Trans. Circuits Syst. II Express Briefs (12) (2014)
Ji-Yong Um, Yoon-Jee Kim, Seong-Eun Cho, Min-Kyun Chae, Jongkeun Song, Bae-Hyung Kim, Seung-Hun Lee, Jihoon Bang, Youngil Kim, Kyungil Cho, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
An Analog-Digital Hybrid RX Beamformer Chip With Non-Uniform Sampling for Ultrasound Medical Imaging With 2D CMUT Array. IEEE Trans. Biomed. Circuits Syst. 8 (6) (2014)
Jae-Seung Lee, Dong-Hee Yeo, Sang-Soo Lee, Hye-Jung Kwon, Jae-Yoon Sim, Byungsub Kim, Hong-June Park
A 0.4 V driving multi-touch capacitive sensor with the driving signal frequency set to (n+0.5) times the inverse of the LCD VCOM noise period. ISCAS (2014)
Yunjae Suh, Seungnam Choi, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
A voltage-scalable 10-b pipelined ADC with current-mode amplifier. CICC (2014)
Seung-Hun Lee, Seon-Kyoo Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
Current-Mode Transceiver for Silicon Interposer Channel. IEEE J. Solid State Circuits 49 (9) (2014)
Seungho Han, Sooeun Lee, Minsoo Choi, Jae-Yoon Sim, Hong-June Park, Byungsub Kim
2.7 A coefficient-error-robust FFE TX with 230% eye-variation improvement without calibration in 65nm CMOS technology. ISSCC (2014)
Hye-Jung Kwon, Jae-Seung Lee, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
Analysis of an Open-Loop Time Amplifier With a Time Gain Determined by the Ratio of Bias Current. IEEE Trans. Circuits Syst. II Express Briefs (7) (2014)
Soo-Min Lee, Il-Min Yi, Hae-Kang Jung, Hyunbae Lee, Yong-Ju Kim, Yunsaing Kim, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
An 80 mV-Swing Single-Ended Duobinary Transceiver With a TIA RX Termination for the Point-to-Point DRAM Interface. IEEE J. Solid State Circuits 49 (11) (2014)
Seon-Kyoo Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
A 5 Gb/s Single-Ended Parallel Receiver With Adaptive Crosstalk-Induced Jitter Cancellation. IEEE J. Solid State Circuits 48 (9) (2013)
Seon-Kyoo Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
A QDR-Based 6-GB/s Parallel Transceiver With Current-Regulated Voltage-Mode Output Driver and Byte CDR for Memory Interface. IEEE Trans. Circuits Syst. II Express Briefs (2) (2013)
Yunjae Suh, Jongmi Lee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
A 10-bit 25-MS/s 1.25-mW Pipelined ADC With a Semidigital Gm-Based Amplifier. IEEE Trans. Circuits Syst. II Express Briefs (3) (2013)
Dong-Woo Jee, Yunjae Suh, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
A FIR-Embedded Phase Interpolator Based Noise Filtering for Wide-Bandwidth Fractional-N PLL. IEEE J. Solid State Circuits 48 (11) (2013)
Dong-Woo Jee, Byungsub Kim, Hong-June Park, Jae-Yoon Sim
A 1.9-GHz Fractional-N Digital PLL With Subexponent ΔΣ TDC and IIR-Based Noise Cancellation. IEEE Trans. Circuits Syst. II Express Briefs (11) (2012)
Jong-Kweon Park, Seung-Kook Ro, Byungsub Kim, Woo Cheol Shin, Hyeon-Hwa Lee
Precision Component Technologies for Microfactory Systems Developed at KIMM. Int. J. Autom. Technol. 4 (2) (2010)
Byungsub Kim, Vladimir Stojanovic
An Energy-Efficient Equalized Transceiver for RC-Dominant Channels. IEEE J. Solid State Circuits 45 (6) (2010)
Byungsub Kim, Yong Liu, Timothy O. Dickson, John F. Bulzacchelli, Daniel J. Friedman
A 10-Gb/s Compact Low-Power Serial I/O With DFE-IIR Equalization in 65-nm CMOS. IEEE J. Solid State Circuits 44 (12) (2009)
Ajay Joshi, Byungsub Kim, Vladimir Stojanovic
Designing Energy-Efficient Low-Diameter On-Chip Networks with Equalized Interconnects. Hot Interconnects (2009)
Yong Liu, Byungsub Kim, Timothy O. Dickson, John F. Bulzacchelli, Daniel J. Friedman
A 10Gb/s compact low-power serial I/O with DFE-IIR equalization in 65nm CMOS. ISSCC (2009)
Byungsub Kim, Vladimir Stojanovic
A 4Gb/s/ch 356fJ/b 10mm equalized on-chip interconnect with nonlinear charge-injecting transmit filter and transimpedance receiver in 90nm CMOS. ISSCC (2009)
Byungsub Kim, Vladimir Stojanovic
Characterization of Equalized and Repeated Interconnects for NoC Applications. IEEE Des. Test Comput. 25 (5) (2008)
Byungsub Kim, Vladimir Stojanovic
Equalized interconnects for on-chip networks: modeling and optimization framework. ICCAD (2007)
Byungsub Kim, Soumyajit Mandal, Rahul Sarpeshkar
Power-adaptive operational amplifier with positive-feedback self biasing. ISCAS (2006)
Byungsub Kim, Hanwu Li, Tsu-Chin Tsao
Control of a dual stage actuator system for noncircular cam turning process. ACC (2001)
Byungsub Kim, Tsu-Chin Tsao
Robust repetitive controller design with improved performance. ACC (2001)

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Byungsub Kim