Il-Min Yi

Publication Activity (10 Years)

Years Active: 2012-2024
Publications (10 Years): 16

Top Topics

Intersymbol Interference

Decision Feedback

Top Venues

IEEE J. Solid State Circuits

VLSI Technology and Circuits

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Hyungryul Kang, Inhyun Kim, Ruida Liu, Ankur Kumar, Il-Min Yi, Yuan Yuan, Zhihong Huang, Samuel Palermo
A 42.7Gb/s Optical Receiver With Digital Clock and Data Recovery in 28nm CMOS. IEEE Access 12 (2024)
Il-Min Yi, Srujan Kumar Kaile, Yuanming Zhu, Julian Camilo Gomez Diaz, Sebastian Hoyos, Samuel Palermo
A 50Gb/s DAC-Based Multicarrier Polar Transmitter in 22nm FinFET. VLSI Technology and Circuits (2023)
Yuanming Zhu, Julian Camilo Gomez Diaz, Srujan Kumar Kaile, Il-Min Yi, Tong Liu, Sebastian Hoyos, Samuel Palermo
A Jitter-Robust 40 Gb/s ADC-Based Multicarrier Receiver Front-End With 4-GS/s Baseband Pipeline-SAR ADCs in 22-nm FinFET. IEEE J. Solid State Circuits 58 (3) (2023)
Po-Hsuan Chang, Anirban Samanta, Peng Yan, Mingye Fu, Yu Zhang, Mehmet Berkay On, Ankur Kumar, Hyungryul Kang, Il-Min Yi, Dedeepya Annabattuni, David Scott, Robert Patti, Yang-Hang Fan, Yuanming Zhu, S. J. Ben Yoo, Samuel Palermo
A Sub-500fJ/bit 3D Direct Bond Silicon Photonic Transceiver in 12nm FinFET. VLSI Technology and Circuits (2023)
Anirban Samanta, Po-Hsuan Chang, Peng Yan, Mingye Fu, Mehmet Berkay On, Ankur Kumar, Hyungryul Kang, Il-Min Yi, Dedeepya Annabattuni, Yu Zhang, David Scott, Robert Patti, Yang-Hang Fan, Yuanming Zhu, Samuel Palermo, S. J. Ben Yoo
A Direct Bond Interconnect 3D Co-Integrated Silicon-Photonic Transceiver in 12nm FinFET with -20.3dBm OMA Sensitivity and 691fJ/bit. OFC (2023)
Yuanming Zhu, Tong Liu, Srujan Kumar Kaile, Shiva Kiran, Il-Min Yi, Ruida Liu, Julian Camilo Gomez Diaz, Sebastian Hoyos, Samuel Palermo
A 38-GS/s 7-bit Pipelined-SAR ADC With Speed- Enhanced Bootstrapped Switch and Output Level Shifting Technique in 22-nm FinFET. IEEE J. Solid State Circuits 58 (8) (2023)
Marjan Fariborz, Mahyar Samani, Pouya Fotouhi, Roberto Proietti, Il-Min Yi, Venkatesh Akella, Jason Lowe-Power, Samuel Palermo, S. J. Ben Yoo
LLM: Realizing Low-Latency Memory by Exploiting Embedded Silicon Photonics for Irregular Workloads. ISC (2022)
Il-Min Yi, Naoki Miura, Hideyuki Nosaka
A 4-GS/s 11.3-mW 7-bit Time-Based ADC With Folding Voltage-to-Time Converter and Pipelined TDC in 65-nm CMOS. IEEE J. Solid State Circuits 56 (2) (2021)
Il-Min Yi, Naoki Miura, Hiroyuki Fukuyama, Hideyuki Nosaka
A 15.1-mW 6-GS/s 6-bit Single-Channel Flash ADC With Selectively Activated 8× Time-Domain Latch Interpolation. IEEE J. Solid State Circuits 56 (2) (2021)
Il-Min Yi, Naoki Miura, Hiroyuki Fukuyama, Hideyuki Nosaka
A 15.1-mW 6-GS/s 6-bit Flash ADC with Selectively Activated 8× Time-Domain Interpolation. A-SSCC (2018)
Il-Min Yi, Naoki Miura, Hiroyuki Fukuyama, Hideyuki Nosaka
A Summer-Embedded Sense Amplifier for High-Speed Decision Feedback Equalizer. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (11) (2018)
Il-Min Yi, Min-Kyun Chae, Seok-Hun Hyun, Seung-Jun Bae, Jung-Hwan Choi, Seong-Jin Jang, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
A Time-Based Receiver With 2-Tap Decision Feedback Equalizer for Single-Ended Mobile DRAM Interface. IEEE J. Solid State Circuits 53 (1) (2018)
Il-Min Yi, Min-Kyun Chae, Seok-Hun Hyun, Seung-Jun Bae, Jung-Hwan Choi, Seong-Jin Jang, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
23.7 A time-based receiver with 2-tap DFE for a 12Gb/s/pin single-ended transceiver of mobile DRAM interface in 0.8V 65nm CMOS. ISSCC (2017)
Il-Min Yi, Seung-Jun Bae, Min-Kyun Chae, Soo-Min Lee, Young Jae Jang, Young-Chul Cho, Young-Soo Sohn, Jung-Hwan Choi, Seong-Jin Jang, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
A low-EMI four-bit four-wire single-ended DRAM interface by using a three-level balanced coding scheme. VLSI Circuits (2016)
Il-Min Yi, Soo-Min Lee, Seung-Jun Bae, Young-Soo Sohn, Jung-Hwan Choi, Seong-Jin Jang, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
A 40 mV-Differential-Channel-Swing Transceiver Using a RX Current-Integrating TIA and a TX Pre-Emphasis Equalizer With a CML Driver at 9 Gb/s. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2016)
Soo-Min Lee, Ji-Hoon Lim, Il-Min Yi, Young Jae Jang, Hae-Kang Jung, Kyunghoon Kim, Dae-Han Kwon, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
A Single-Ended Parallel Transceiver With Four-Bit Four-Wire Four-Level Balanced Coding for the Point-to-Point DRAM Interface. IEEE J. Solid State Circuits 51 (8) (2016)
Il-Min Yi, Soo-Min Lee, Seung-Jun Bae, Young-Soo Sohn, Jung-Hwan Choi, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
A 40-mV-Swing Single-Ended Transceiver for TSV with a Switched-Diode RX Termination. IEEE Trans. Circuits Syst. II Express Briefs (12) (2014)
Soo-Min Lee, Il-Min Yi, Hae-Kang Jung, Hyunbae Lee, Yong-Ju Kim, Yunsaing Kim, Byungsub Kim, Jae-Yoon Sim, Hong-June Park
An 80 mV-Swing Single-Ended Duobinary Transceiver With a TIA RX Termination for the Point-to-Point DRAM Interface. IEEE J. Solid State Circuits 49 (11) (2014)
Hae-Kang Jung, Il-Min Yi, Soo-Min Lee, Jae-Yoon Sim, Hong-June Park
A Transmitter to Compensate for Crosstalk-Induced Jitter by Subtracting a Rectangular Crosstalk Waveform From Data Signal During the Data Transition Time in Coupled Microstrip Lines. IEEE J. Solid State Circuits 47 (9) (2012)
Il-Min Yi, Seung-Jun Bae, Young-Soo Sohn, Jae-Yoon Sim, Hong-June Park
An on-chip TSV emulation using metal bar surrounded by metal ring to develop interface circuits. ISOCC (2012)