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A 0.3-to-1.2V frequency-scalable fractional-N ADPLL with a speculative dual-referenced interpolating TDC.
Minseob Lee
Shinwoong Kim
Hwasuk Cho
Jahyun Koo
Kwang-Hee Choi
Jin-Hyeok Choi
Byungsub Kim
Hong-June Park
Jae-Yoon Sim
Published in:
ISSCC (2018)
Keyphrases
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phase locked loop
user friendly
multipath
primal dual
highly scalable
fractional order
case study
low frequency
interpolation method
high voltage
computational complexity
lower bound
wavelet transform
linear programming
basis functions