Yong Liu

Publication Activity (10 Years)

Years Active: 2002-2016
Publications (10 Years): 2

Top Topics

Cmos Technology

Silicon On Insulator

Signal Transduction

Destination Node

Top Venues

IEEE J. Solid State Circuits

Publications

Sergey V. Rylov, Troy J. Beukema, Zeynep Toprak Deniz, Thomas Toifl, Yong Liu, Ankur Agrawal, Peter Buchmann, Alexander V. Rylyakov, Michael P. Beakes, Benjamin D. Parker, Mounir Meghelli
3.1 A 25Gb/s ADC-based serial line receiver in 32nm CMOS SOI. ISSCC (2016)
Timothy O. Dickson, Yong Liu, Ankur Agrawal, John F. Bulzacchelli, Herschel A. Ainspan, Zeynep Toprak Deniz, Benjamin D. Parker, Michael P. Beakes, Mounir Meghelli, Daniel J. Friedman
A 1.8 pJ/bit 16×16Gb/s Source-Synchronous Parallel Interface in 32 nm SOI CMOS with Receiver Redundancy for Link Recalibration. IEEE J. Solid State Circuits 51 (8) (2016)
Timothy O. Dickson, Yong Liu, Sergey V. Rylov, Ankur Agrawal, Seongwon Kim, Ping-Hsuan Hsieh, John F. Bulzacchelli, Mark A. Ferriss, Herschel A. Ainspan, Alexander V. Rylyakov, Benjamin D. Parker, Michael P. Beakes, Christian W. Baks, Lei Shan, Young Hoon Kwark, José A. Tierno, Daniel J. Friedman
A 1.4 pJ/bit, Power-Scalable 16×12 Gb/s Source-Synchronous I/O With DFE Receiver in 32 nm SOI CMOS Technology. IEEE J. Solid State Circuits 50 (8) (2015)
Timothy O. Dickson, Yong Liu, Ankur Agrawal, John F. Bulzacchelli, Herschel A. Ainspan, Zeynep Toprak Deniz, Benjamin D. Parker, Mounir Meghelli, Daniel J. Friedman
A 1.8-pJ/bit 16×16-Gb/s source synchronous parallel interface in 32nm SOI CMOS with receiver redundancy for link recalibration. CICC (2015)
Timothy O. Dickson, Yong Liu, Sergey V. Rylov, Ankur Agrawal, Seongwon Kim, Ping-Hsuan Hsieh, John F. Bulzacchelli, Mark A. Ferriss, Herschel A. Ainspan, Alexander V. Rylyakov, Benjamin D. Parker, Christian W. Baks, Lei Shan, Young Hoon Kwark, José A. Tierno, Daniel J. Friedman
A 1.4-pJ/b, power-scalable 16×12-Gb/s source-synchronous I/O with DFE receiver in 32nm SOI CMOS technology. CICC (2014)
Yong Liu, Ping-Hsuan Hsieh, Seongwon Kim, Jae-sun Seo, Robert K. Montoye, Leland Chang, José A. Tierno, Daniel J. Friedman
A 0.1pJ/b 5-to-10Gb/s charge-recycling stacked low-power I/O for on-chip signaling in 45nm CMOS SOI. ISSCC (2013)
Ankur Agrawal, John F. Bulzacchelli, Timothy O. Dickson, Yong Liu, José A. Tierno, Daniel J. Friedman
A 19Gb/s serial link receiver with both 4-tap FFE and 5-tap DFE functions in 45nm SOI CMOS. ISSCC (2012)
Ankur Agrawal, John F. Bulzacchelli, Timothy O. Dickson, Yong Liu, José A. Tierno, Daniel J. Friedman
A 19-Gb/s Serial Link Receiver With Both 4-Tap FFE and 5-Tap DFE Functions in 45-nm SOI CMOS. IEEE J. Solid State Circuits 47 (12) (2012)
Yong Liu, Wing K. Luk, Daniel J. Friedman
A compact low-power 3D I/O in 45nm CMOS. ISSCC (2012)
Nan Sun, Yong Liu, Ling Qin, Guangyu Xu, Donhee Ham
Solid-state and biological systems interface. ESSCIRC (2012)
Timothy O. Dickson, Yong Liu, Sergey V. Rylov, Bing Dang, Cornelia K. Tsang, Paul S. Andry, John F. Bulzacchelli, Herschel A. Ainspan, Xiaoxiong Gu, Lavanya Turlapati, Michael P. Beakes, Benjamin D. Parker, John U. Knickerbocker, Daniel J. Friedman
An 8x 10-Gb/s Source-Synchronous I/O System Based on High-Density Silicon Carrier Interconnects. IEEE J. Solid State Circuits 47 (4) (2012)
Jae-sun Seo, Bernard Brezzo, Yong Liu, Benjamin D. Parker, Steven K. Esser, Robert K. Montoye, Bipin Rajendran, José A. Tierno, Leland Chang, Dharmendra S. Modha, Daniel J. Friedman
A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons. CICC (2011)
Byungsub Kim, Yong Liu, Timothy O. Dickson, John F. Bulzacchelli, Daniel J. Friedman
A 10-Gb/s Compact Low-Power Serial I/O With DFE-IIR Equalization in 65-nm CMOS. IEEE J. Solid State Circuits 44 (12) (2009)
Yong Liu, Byungsub Kim, Timothy O. Dickson, John F. Bulzacchelli, Daniel J. Friedman
A 10Gb/s compact low-power serial I/O with DFE-IIR equalization in 65nm CMOS. ISSCC (2009)
Nan Sun, Yong Liu, Hakho Lee, Ralph Weissleder, Donhee Ham
CMOS RF Biosensor Utilizing Nuclear Magnetic Resonance. IEEE J. Solid State Circuits 44 (5) (2009)
Kyoungho Woo, Yong Liu, Eunsoo Nam, Donhee Ham
Fast-Lock Hybrid PLL Combining Fractional-N and Integer-N Modes of Differing Bandwidths. IEEE J. Solid State Circuits 43 (2) (2008)
Yong Liu, Nan Sun, Hakho Lee, Ralph Weissleder, Donhee Ham
CMOS Mini Nuclear Magnetic Resonance System and its Application for Biomolecular Sensing. ISSCC (2008)
Yong Liu, Woogeun Rhee, Daniel J. Friedman, Donhee Ham
All-Digital Dynamic Self-Detection and Self-Compensation of Static Phase Offsets in Charge-Pump PLLs. ISSCC (2007)
Hakho Lee, Yong Liu, Robert M. Westervelt, Donhee Ham
IC/microfluidic hybrid system for magnetic manipulation of biological cells. IEEE J. Solid State Circuits 41 (6) (2006)
Yong Liu, Zhiqiang Gao, Xiangqing He
A Flexible Embedded SRAM Compiler. DELTA (2002)