A compact low-power 3D I/O in 45nm CMOS.
Yong LiuWing K. LukDaniel J. FriedmanPublished in: ISSCC (2012)
Keyphrases
- low power
- cmos technology
- nm technology
- power consumption
- high speed
- low cost
- single chip
- ultra low power
- wireless transmission
- vlsi circuits
- vlsi architecture
- low voltage
- power dissipation
- image sensor
- high power
- digital signal processing
- mixed signal
- power reduction
- low power consumption
- silicon on insulator
- gate array
- logic circuits
- cmos image sensor
- file system
- delay insensitive
- power saving
- signal processor
- image processing