A 10Gb/s compact low-power serial I/O with DFE-IIR equalization in 65nm CMOS.
Yong LiuByungsub KimTimothy O. DicksonJohn F. BulzacchelliDaniel J. FriedmanPublished in: ISSCC (2009)
Keyphrases
- low power
- cmos technology
- high speed
- decision feedback
- nm technology
- power consumption
- low cost
- vlsi circuits
- low voltage
- single chip
- image sensor
- multipath
- mixed signal
- logic circuits
- silicon on insulator
- power reduction
- vlsi architecture
- error propagation
- low power consumption
- delay insensitive
- file system
- real time
- power dissipation
- digital signal processing
- parallel processing
- power saving
- main memory
- metal oxide semiconductor
- ultra low power