Login / Signup

A 2 GHz Synthesized Fractional-N ADPLL With Dual-Referenced Interpolating TDC.

Shinwoong KimSeunghwan HongKapseok ChangHyungsik JuJaewook ShinByungsub KimHong-June ParkJae-Yoon Sim
Published in: IEEE J. Solid State Circuits (2016)
Keyphrases
  • user friendly
  • phase locked loop
  • high speed
  • hurst exponent
  • expert systems
  • high resolution
  • high frequency
  • primal dual
  • interpolation method
  • synthesized images