Davide Sacchetto

Publication Activity (10 Years)

Years Active: 2010-2022
Publications (10 Years): 4

Top Topics

Cmos Technology

Polarity Classification

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

IEEE J. Emerg. Sel. Topics Circuits Syst.

Publications

Cosimo Calò, Kaoutar Benyahya, Haïk Mardoyan, Philippe Charbonnier, Davide Sacchetto, Michael Zervas, Karim Mekhazni, Delphine Lanteri, Harry Gariah, Catherine Fortin, Nicolas Vaissière, Antoine Elias, Olivier Parillaud, Franck Mallecot, Jean Decobert, Frédéric Pommereau, Jérémie Renaudier
Hybrid InP-SiN microring-resonator based tunable laser with high output power and narrow linewidth for high capacity coherent systems. OFC (2022)
Jury Sandrini, Marios Barlas, Maxime Thammasack, Tugba Demirci, Michele De Marchi, Davide Sacchetto, Pierre-Emmanuel Gaillardon, Giovanni De Micheli, Yusuf Leblebici
Co-Design of ReRAM Passive Crossbar Arrays Integrated in 180 nm CMOS Technology. IEEE J. Emerg. Sel. Topics Circuits Syst. 6 (3) (2016)
Pierre-Emmanuel Gaillardon, Xifan Tang, Jury Sandrini, Maxime Thammasack, Somayyeh Rahimian Omam, Davide Sacchetto, Yusuf Leblebici, Giovanni De Micheli
A ultra-low-power FPGA based on monolithically integrated RRAMs. DATE (2015)
Jury Sandrini, Tugba Demirci, Maxime Thammasack, Davide Sacchetto, Yusuf Leblebici
Low-voltage read/write circuit design for transistorless ReRAM crossbar arrays in 180nm CMOS technology. ISCAS (2015)
Ibrahim Kazi, Pascal Andreas Meinerzhagen, Pierre-Emmanuel Gaillardon, Davide Sacchetto, Yusuf Leblebici, Andreas Peter Burg, Giovanni De Micheli
Energy/Reliability Trade-Offs in Low-Voltage ReRAM-Based Non-Volatile Flip-Flop Design. IEEE Trans. Circuits Syst. I Regul. Pap. (11) (2014)
Pierre-Emmanuel Gaillardon, Luca Gaetano Amarù, Shashikanth Bobba, Michele De Marchi, Davide Sacchetto, Yusuf Leblebici, Giovanni De Micheli
Vertically-stacked double-gate nanowire FETs with controllable polarity: from devices to regular ASICs. DATE (2013)
Ibrahim Kazi, Pascal Meinerzhagen, Pierre-Emmanuel Gaillardon, Davide Sacchetto, Andreas Burg, Giovanni De Micheli
A ReRAM-based non-volatile flip-flop with sub-VT read and CMOS voltage-compatible write. NEWCAS (2013)
Pierre-Emmanuel Gaillardon, Michele De Marchi, Luca Gaetano Amarù, Shashikanth Bobba, Davide Sacchetto, Yusuf Leblebici, Giovanni De Micheli
Towards structured ASICs using polarity-tunable Si nanowire transistors. DAC (2013)
Davide Sacchetto, Giovanni De Micheli, Yusuf Leblebici
Multiterminal Memristive Nanowire Devices for Logic and Memory Applications: A Review. Proc. IEEE 100 (6) (2012)
Pierre-Emmanuel Gaillardon, Davide Sacchetto, Shashikanth Bobba, Yusuf Leblebici, Giovanni De Micheli
GMS: Generic memristive structure for non-volatile FPGAs. VLSI-SoC (2012)
Shashikanth Bobba, Pierre-Emmanuel Gaillardon, Jian Zhang, Michele De Marchi, Davide Sacchetto, Yusuf Leblebici, Giovanni De Micheli
Process/design co-optimization of regular logic tiles for double-gate silicon nanowire transistors. NANOARCH (2012)
Davide Sacchetto, Michele De Marchi, Giovanni De Micheli, Yusuf Leblebici
Alternative design methodologies for the next generation logic switch. ICCAD (2011)
Davide Sacchetto, M. Haykel Ben Jamaa, Giovanni De Micheli, Yusuf Leblebici
Design aspects of carry lookahead adders with vertically-stacked nanowire transistors. ISCAS (2010)
Davide Sacchetto, M. Haykel Ben Jamaa, Sandro Carrara, Giovanni De Micheli, Yusuf Leblebici
Memristive devices fabricated with silicon nanowire schottky barrier transistors. ISCAS (2010)