Robert D. Turney

Publication Activity (10 Years)

Years Active: 1999-2020
Publications (10 Years): 3

Top Topics

Decision Making

Optimization Method

Mixed Integer Nonlinear Programming

Top Venues

Comput. Chem. Eng.

Publications

Michael J. Risbeck, Christos T. Maravelias, James B. Rawlings, Robert D. Turney
Mixed-integer optimization methods for online scheduling in large-scale HVAC systems. Optim. Lett. 14 (4) (2020)
James B. Rawlings, Nishith R. Patel, Michael J. Risbeck, Christos T. Maravelias, Michael J. Wenzel, Robert D. Turney
Economic MPC and real-time decision making with application to large-scale HVAC energy systems. Comput. Chem. Eng. 114 (2018)
Nishith R. Patel, Michael J. Risbeck, James B. Rawlings, Michael J. Wenzel, Robert D. Turney
Distributed economic model predictive control for large-scale building temperature regulation. ACC (2016)
Michael J. Risbeck, Christos T. Maravelias, James B. Rawlings, Robert D. Turney
Cost optimization of combined building heating/cooling equipment via mixed-integer linear programming. ACC (2015)
Yifeng Qiu, Wael M. Badawy, Robert D. Turney
An Architecture for Programmable Multi-core IP Accelerated Platform with an Advanced Application of H.264 Codec Implementation. J. Signal Process. Syst. 57 (2) (2009)
Ihab Amer, Wael M. Badawy, Graham A. Jullien, Marco Mattavelli, Robert D. Turney
A Simplified 8 × 8 Transformation and Quantization Real-Time IP-Block for MPEG-4 H.264/AVC Applications: a New Design Flow Approach. J. Circuits Syst. Comput. 16 (6) (2007)
Kristof Denolf, Adrian Chirila-Rus, Paul R. Schumacher, Robert D. Turney, Kees A. Vissers, Diederik Verkest, Henk Corporaal
A Systematic Approach to Design Low-Power Video Codec Cores. EURASIP J. Embed. Syst. 2007 (2007)
Yifeng Qiu, Wael M. Badawy, Robert D. Turney
A Prototyping Co-design Platform with A Simplified Architecture for Video Codec Implementation. ISCAS (2007)
T. Chiang, Marco Mattavelli, Robert D. Turney
Introduction to the Special Issue on Integrated Multimedia Platforms. IEEE Trans. Circuits Syst. Video Technol. 15 (5) (2005)
Paul R. Schumacher, Marco Mattavelli, Adrian Chirila-Rus, Robert D. Turney
A Virtual Socket Framework for Rapid Emulation of Video and Multimedia Designs. ICME (2005)
Paul R. Schumacher, Kristof Denolf, Adrian Chirila-Rus, Robert D. Turney, Nick Fedele, Kees A. Vissers, Jan Bormans
A scalable, multi-stream MPEG-4 video decoder for conferencing and surveillance applications. ICIP (2) (2005)
Kristof Denolf, Adrian Chirila-Rus, Robert D. Turney, Paul R. Schumacher, Kees A. Vissers
Memory Efficient Design of an MPEG-4 Video Encoder for FPGAs. FPL (2005)
Kristof Denolf, Christophe De Vleeschouwer, Robert D. Turney, Gauthier Lafruit, Jan Bormans
Memory Centric Design of an MPEG-4 Video Encoder. IEEE Trans. Circuits Syst. Video Technol. 15 (5) (2005)
Paul R. Schumacher, Marco Mattavelli, Adrian Chirila-Rus, Robert D. Turney
A Software/Hardware Platform for Rapid Prototyping of Video and Multimedia Designs. IWSOC (2005)
Massimo Ravasi, Marco Mattavelli, Paul R. Schumacher, Robert D. Turney
High-Level Algorithmic Complexity Analysis for the Implementation of a Motion-JPEG2000 Encoder. PATMOS (2003)
Justin G. R. Delva, Ali M. Reza, Robert D. Turney
FPGA implementation of a nonlinear two dimensional fuzzy filter. ICASSP (1999)
Robert D. Turney, Ali M. Reza, Justin G. R. Delva
FPGA implementation of adaptive temporal Kalman filter for real time video filtering. ICASSP (1999)