Keizo Hiraga

Publication Activity (10 Years)

Years Active: 2000-2024
Publications (10 Years): 8

Top Topics

Shape Variability

Energy Efficient

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

VLSI Technology and Circuits

Publications

Kimiyoshi Usami, Daiki Yokoyama, Aika Kamei, Hideharu Amano, Kenta Suzuki, Keizo Hiraga, Kazuhiro Bessho
Optimized Two-Step Store Control for MTJ-Based Nonvolatile Flip-Flops to Minimize Store Energy Under Process and Temperature Variations. IEEE Trans. Very Large Scale Integr. Syst. 32 (1) (2024)
Aika Kamei, Hideharu Amano, Takuya Kojima, Daiki Yokoyama, Kimiyoshi Usami, Keizo Hiraga, Kenta Suzuki, Kazuhiro Bessho
A Variation-Aware MTJ Store Energy Estimation Model for Edge Devices With Verify-and-Retryable Nonvolatile Flip-Flops. IEEE Trans. Very Large Scale Integr. Syst. 31 (4) (2023)
Shota Nakabeppu, Nobuyuki Yamasaki, Kenta Suzuki, Keizo Hiraga, Kazuhiro Bessho
A Non-stop Fault-Tolerant Real-Time System-on-Chip/System-in-Package. candar (2023)
Kenta Suzuki, Keizo Hiraga, Kazuhiro Bessho, Kimiyoshi Usami, Taku Umebayashi
A 40 nm 2 kb MTJ-Based Non-Volatile SRAM Macro with Novel Data-Aware Store Architecture for Normally Off Computing. VLSI Technology and Circuits (2023)
Aika Kamei, Takuya Kojima, Hideharu Amano, Daiki Yokoyama, Hisato Miyauchi, Kimiyoshi Usami, Keizo Hiraga, Kenta Suzuki, Kazuhiro Bessho
Energy saving in a multi-context coarse grained reconfigurable array with non-volatile flip-flops. MCSoC (2021)
Kimiyoshi Usami, Sosuke Akiba, Hideharu Amano, Takeharu Ikezoe, Keizo Hiraga, Kenta Suzuki, Yasuo Kanda
Non-Volatile Coarse Grained Reconfigurable Array Enabling Two-step Store Control for Energy Minimization. COOL CHIPS (2020)
Kimiyoshi Usami, Junya Akaike, Sosuke Akiba, Masaru Kudo, Hideharu Amano, Takeharu Ikezoe, Keizo Hiraga, Yusuke Shuto, Kojiro Yagami
Energy Efficient Write Verify and Retry Scheme for MTJ Based Flip-Flop and Application. NVMSA (2018)
Takeharu Ikezoe, Hideharu Amano, Junya Akaike, Kimiyoshi Usami, Masaru Kudo, Keizo Hiraga, Yusuke Shuto, Kojiro Yagami
A Coarse Grained-Reconfigurable Accelerator with energy efficient MTJ-based Non-volatile Flip-flops. ReConFig (2018)
Kazuyuki Tomida, Keizo Hiraga, Morin Dehan, Geert Hellings, Doyoung Jang, Kenichi Miyaguchi, Thomas Chiarella, Minsoo Kim, Anda Mocuta, Naoto Horiguchi, Abdelkarim Mercha, Diederik Verkest, Aaron Thean
Impact of fin shape variability on device performance towards 10nm node. ICICDT (2015)
Hiromi Nobukata, Shunsuke Takagi, Keizo Hiraga, Takeshi Ohgishi, Masaru Miyashita, Kazuto Kamimura, Shinji Hiramatsu, Kiyohisa Sakai, Takahiro Ishida, Hideki Arakawa, Masahiko Itoh, Ihachi Naiki, Masanori Noda
A 144-Mb, eight-level NAND flash memory with optimized pulsewidth programming. IEEE J. Solid State Circuits 35 (5) (2000)