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A 3.6pJ/access 480MHz, 128Kbit on-Chip SRAM with 850MHz boost mode in 90nm CMOS with tunable sense amplifiers to cope with variability.
Stefan Cosemans
Wim Dehaene
Francky Catthoor
Published in:
ESSCIRC (2008)
Keyphrases
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cmos technology
nm technology
power consumption
low power
low voltage
parallel processing
high speed
power dissipation
mixed signal
silicon on insulator
image sensor
power management
access control
data center
digital signal processing
cmos image sensor