Felice Crupi

Publication Activity (10 Years)

Years Active: 2002-2024
Publications (10 Years): 37

Top Topics

Design Guidelines

Gate Dielectrics

Sigmoid Function

Energy Efficiency

Top Venues

Int. J. Circuit Theory Appl.

IEEE Trans. Circuits Syst. II Express Briefs

Publications

Fanny Spagnolo, Stefania Perri, Massimo Vatalaro, Fabio Frustaci, Felice Crupi, Pasquale Corsonello
Exploring the Usage of Fast Carry Chains to Implement Multistage Ring Oscillators on FPGAs: Design and Characterization. IEEE Trans. Very Large Scale Integr. Syst. 32 (8) (2024)
Luigi Fassio, Longyang Lin, Raffaele De Rose, Marco Lanuzza, Felice Crupi, Massimo Alioto
Voltage Reference With Corner-Aware Replica Selection/Merging for 1.4-mV Accuracy in Harvested Systems Down to 3.9 pW, 0.2 V. IEEE Access 11 (2023)
Marco Mercuri, Patrizia Vizza, Pierangelo Veltri, Felice Crupi
OSA evaluation by using clinical parameters monitoring system based on Radar Technology. EWSN (2023)
Tatiana Moposita, Esteban Garzón, Felice Crupi, Lionel Trojman, Andrei Vladimirescu, Marco Lanuzza
Efficiency of Double-Barrier Magnetic Tunnel Junction-Based Digital eNVM Array for Neuro-Inspired Computing. IEEE Trans. Circuits Syst. II Express Briefs 70 (3) (2023)
Massimo Vatalaro, H. Neill, F. Gity, Paolo Magnone, V. Maccaronio, C. Márquez, J. C. Galdon, F. Gamiz, Felice Crupi, P. Hurley, R. De Rose
-based devices for hardware security. CoRR (2023)
Tatiana Moposita, Esteban Garzón, Raffaele De Rose, Felice Crupi, Andrei Vladimirescu, Lionel Trojman, Marco Lanuzza
SIMPLY+: A Reliable STT-MRAM-Based Smart Material Implication Architecture for In-Memory Computing. IEEE Access 11 (2023)
Tatiana Moposita, Lionel Trojman, Felice Crupi, Marco Lanuzza, Andrei Vladimirescu
Voltage-to-Voltage Sigmoid Neuron Activation Function Design for Artificial Neural Networks. LASCAS (2022)
Massimo Vatalaro, Raffaele De Rose, Marco Lanuzza, Felice Crupi
Stability-Area Trade-off in Static CMOS PUF Based on 4T Subthreshold Voltage Divider. ICECS 2022 (2022)
Raffaele De Rose, Tommaso Zanotti, Francesco Maria Puglisi, Felice Crupi, Paolo Pavan, Marco Lanuzza
Smart Material Implication Using Spin-Transfer Torque Magnetic Tunnel Junctions for Logic-in-Memory Computing. CoRR (2022)
Benjamin Zambrano, Esteban Garzón, Sebastiano Strangio, Felice Crupi, Marco Lanuzza
A 0.05 mm², 350 mV, 14 nW Fully-Integrated Temperature Sensor in 180-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs 69 (3) (2022)
Stefano Laureti, Marco Mercuri, David Hutchins, Felice Crupi, Marco Ricci
Modified FMCW Scheme for Improved Ultrasonic Positioning and Ranging of Unmanned Ground Vehicles at Distances < 50 mm. Sensors 22 (24) (2022)
Massimo Vatalaro, Raffaele De Rose, Marco Lanuzza, Felice Crupi
Static CMOS Physically Unclonable Function Based on 4T Voltage Divider With 0.6%-1.5% Bit Instability at 0.4-1.8 V Operation in 180 nm. IEEE J. Solid State Circuits 57 (8) (2022)
Marco Mercuri, Tom Torfs, Maxim Rykunov, Stefano Laureti, Marco Ricci, Felice Crupi
Analysis of Signal Processing Methods to Reject the DC Offset Contribution of Static Reflectors in FMCW Radar-Based Vital Signs Monitoring. Sensors 22 (24) (2022)
Esteban Garzón, Raffaele De Rose, Felice Crupi, Lionel Trojman, Adam Teman, Marco Lanuzza
Adjusting Thermal Stability in Double-Barrier MTJ for Energy Improvement in Cryogenic STT-MRAMs. CoRR (2022)
Luigi Fassio, Francesco Settino, Longyang Lin, Raffaele De Rose, Marco Lanuzza, Felice Crupi, Massimo Alioto
A Robust, High-Speed and Energy-Efficient Ultralow-Voltage Level Shifter. IEEE Trans. Circuits Syst. II Express Briefs 68 (4) (2021)
Luigi Fassio, Longyang Lin, Raffaele De Rose, Marco Lanuzza, Felice Crupi, Massimo Alioto
A 0.6-to-1.8V CMOS Current Reference With Near-100% Power Utilization. IEEE Trans. Circuits Syst. II Express Briefs 68 (9) (2021)
Carmelo Felicetti, Marco Lanuzza, Antonino Rullo, Domenico Saccà, Felice Crupi
Exploiting Silicon Fingerprint for Device Authentication Using CMOS-PUF and ECC. SmartIoT (2021)
Luigi Fassio, Longyang Lin, Raffaele De Rose, Marco Lanuzza, Felice Crupi, Massimo Alioto
A 3.2-pW, 0.2-V Trimming-Less Voltage Reference with 1.4-mV Across-Wafer Total Accuracy. ESSCIRC (2021)
Luigi Fassio, Longyang Lin, Raffaele De Rose, Marco Lanuzza, Felice Crupi, Massimo Alioto
Trimming-Less Voltage Reference for Highly Uncertain Harvesting Down to 0.25 V, 5.4 pW. IEEE J. Solid State Circuits 56 (10) (2021)
Luigi Fassio, Longyang Lin, Raffaele De Rose, Marco Lanuzza, Felice Crupi, Massimo Alioto
Area in 180nm. VLSI Circuits (2020)
Esteban Garzón, Raffaele De Rose, Felice Crupi, Lionel Trojman, Giovanni Finocchio, Mario Carpentieri, Marco Lanuzza
Assessment of STT-MRAMs based on double-barrier MTJs for cache applications by means of a device-to-system level simulation framework. Integr. 71 (2020)
Marco Lanuzza, Raffaele De Rose, Esteban Garzón, Felice Crupi
Evaluating the Energy Efficiency of STT-MRAMs Based on Perpendicular MTJs with Double Reference Layers. ASICON (2019)
Davide Cornigli, Andrea Natale Tallarico, Susanna Reggiani, Claudio Fiegna, Enrico Sangiorgi, Luis Sanchez, Carlos Valdivieso, Giuseppe Consentino, Felice Crupi
Characterization and Modeling of BTI in SiC MOSFETs. ESSDERC (2019)
Marco Lanuzza, Raffaele De Rose, Felice Crupi, Massimo Alioto
An Energy Aware Variation-Tolerant Writing Termination Control for STT-based Non Volatile Flip-Flops. ICECS (2019)
Carmelo Felicetti, Angelo Furfaro, Domenico Saccà, Massimo Vatalaro, Marco Lanuzza, Felice Crupi
Making IoT Services Accountable: A Solution Based on Blockchain and Physically Unclonable Functions. IDCS (2019)
Esteban Garzón, Raffaele De Rose, Felice Crupi, Marco Lanuzza
Device-to-System Level Simulation Framework for STT-DMTJ Based Cache Memory. ICECS (2019)
Esteban Garzón, Raffaele De Rose, Felice Crupi, Lionel Trojman, Giovanni Finocchio, Mario Carpentieri, Marco Lanuzza
Exploiting Double-Barrier MTJs for Energy-Efficient Nanoscaled STT-MRAMs. SMACD (2019)
Raffaele De Rose, Felice Crupi, Maksym Paliy, Marco Lanuzza, Giuseppe Iannaccone
Design of a 3T current reference for low-voltage, low-power operation. ICICDT (2018)
Noemi Guerra, Raffaele De Rose, Marco Guevara, Paul Procel, Marco Lanuzza, Felice Crupi
Impact of the Emitter Contact Pattern in c-Si BC- BJ Solar Cells by Numerical Simulations. RTSI (2018)
Raffaele De Rose, Marco Lanuzza, Felice Crupi, Giulio Siracusano, Riccardo Tomasello, Giovanni Finocchio, Mario Carpentieri, Massimo Alioto
A Variation-Aware Timing Modeling Approach for Write Operation in Hybrid CMOS/STT-MTJ Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. (3) (2018)
Felice Crupi, Raffaele De Rose, Maksym Paliy, Marco Lanuzza, Mattia Perna, Giuseppe Iannaccone
A portable class of 3-transistor current references with low-power sub-0.5 V operation. Int. J. Circuit Theory Appl. 46 (4) (2018)
Raffaele De Rose, Greta Carangelo, Marco Lanuzza, Felice Crupi, Giovanni Finocchio, Mario Carpentieri
Impact of voltage scaling on STT-MRAMs through a variability-aware simulation framework. SMACD (2017)
Marco Lanuzza, Felice Crupi, Sandro Rao, Raffaele De Rose, Giuseppe Iannaccone
Low energy/delay overhead level shifter for wide-range voltage conversion. Int. J. Circuit Theory Appl. 45 (11) (2017)
Marco Lanuzza, Felice Crupi, Sandro Rao, Raffaele De Rose, Sebastiano Strangio, Giuseppe Iannaccone
An Ultralow-Voltage Energy-Efficient Level Shifter. IEEE Trans. Circuits Syst. II Express Briefs (1) (2017)
Raffaele De Rose, Felice Crupi, Marco Lanuzza, Domenico Albano
A physical unclonable function based on a 2-transistor subthreshold voltage divider. Int. J. Circuit Theory Appl. 45 (2) (2017)
Raffaele De Rose, Marco Lanuzza, Felice Crupi, Giulio Siracusano, Riccardo Tomasello, Giovanni Finocchio, Mario Carpentieri, Massimo Alioto
A variation-aware simulation framework for hybrid CMOS/spintronic circuits. ISCAS (2017)
Raffaele De Rose, Domenico Albano, Felice Crupi, Marco Lanuzza
Design of a sub-1-V nanopower CMOS current reference. ECCTD (2017)
Domenico Albano, Felice Crupi, Francesca Cucchi, Giuseppe Iannaccone
A Sub-kT/q Voltage Reference Operating at 150 mV. IEEE Trans. Very Large Scale Integr. Syst. 23 (8) (2015)
Ben Kaczer, Jacopo Franco, M. Cho, Tibor Grasser, Philippe J. Roussel, Stanislav Tyaginov, M. Bina, Yannick Wimmer, Luis-Miguel Procel, Lionel Trojman, Felice Crupi, Gregory Pitner, Vamsi Putcha, Pieter Weckx, Erik Bury, Z. Ji, A. De Keersgieter, Thomas Chiarella, Naoto Horiguchi, Guido Groeseneken, Aaron Thean
Origins and implications of increased channel hot carrier variability in nFinFETs. IRPS (2015)
Luca Magnelli, Felice Crupi, Pasquale Corsonello, Giuseppe Iannaccone
A sub-1 V nanopower temperature-compensated sub-threshold CMOS voltage reference with 0.065%/V line sensitivity. Int. J. Circuit Theory Appl. 43 (4) (2015)
Domenico Albano, Marco Lanuzza, Ramiro Taco, Felice Crupi
Gate-level body biasing for subthreshold logic circuits: analytical modeling and design guidelines. Int. J. Circuit Theory Appl. 43 (11) (2015)
Sebastiano Strangio, Pierpaolo Palestri, David Esseni, Luca Selmi, Felice Crupi
Analysis of TFET based 6T SRAM cells implemented with state of the art silicon nanowires. ESSDERC (2014)
Domenico Albano, Felice Crupi, Francesca Cucchi, Giuseppe Iannaccone
A picopower temperature-compensated, subthreshold CMOS voltage reference. Int. J. Circuit Theory Appl. 42 (12) (2014)
Luca Magnelli, Francesco A. Amoroso, Felice Crupi, Gregorio Cappuccino, Giuseppe Iannaccone
Design of a 75-nW, 0.5-V subthreshold complementary metal-oxide-semiconductor operational amplifier. Int. J. Circuit Theory Appl. 42 (9) (2014)
Marc Aoulaiche, Eddy Simoen, Romain Ritzenthaler, Tom Schram, Hiroaki Arimura, Moonju Cho, Thomas Kauerauf, Guido Groeseneken, Naoto Horiguchi, Aaron Thean, Antonio Federico, Felice Crupi, Alessio Spessot, Christian Caillat, Pierre Fazan, H.-J. Na, Y. Son, K. B. Noh
Impact of Al2O3 position on performances and reliability in high-k metal gated DRAM periphery transistors. ESSDERC (2013)
Jacopo Franco, S. Graziano, Ben Kaczer, Felice Crupi, Lars-Åke Ragnarsson, Tibor Grasser, Guido Groeseneken
BTI reliability of ultra-thin EOT MOSFETs for sub-threshold logic. Microelectron. Reliab. 52 (9-10) (2012)
Tommaso Romeo, Luigi Pantisano, Eddy Simoen, Raymond Krom, Mitsuhiro Togo, N. Horiguchi, Jérôme Mitard, Aaron Thean, Guido Groeseneken, Cor Claeys, Felice Crupi
Low-frequency noise assessment of the transport mechanisms in SiGe channel bulk FinFETs. ESSDERC (2012)
Felice Crupi, Massimo Alioto, Jacopo Franco, Paolo Magnone, Ben Kaczer, Guido Groeseneken, Jérôme Mitard, Liesbeth Witters, Thomas Y. Hoffmann
Buried Silicon-Germanium pMOSFETs: Experimental Analysis in VLSI Logic Circuits Under Aggressive Voltage Scaling. IEEE Trans. Very Large Scale Integr. Syst. 20 (8) (2012)
Raffaele De Rose, Antonio Malomo, Paolo Magnone, Felice Crupi, Giorgio Cellere, Marco Martire, Diego Tonini, Enrico Sangiorgi
A methodology to account for the finger interruptions in solar cell performance. Microelectron. Reliab. 52 (9-10) (2012)
Jacopo Franco, Ben Kaczer, Jérôme Mitard, Maria Toledano-Luque, Felice Crupi, Geert Eneman, Ph. J. Rousse, Tibor Grasser, M. Cho, Thomas Kauerauf, Liesbeth Witters, Geert Hellings, L.-Å. Ragnarsson, Naoto Horiguchi, Marc M. Heyns, Guido Groeseneken
Superior reliability and reduced Time-Dependent variability in high-mobility SiGe channel pMOSFETs for VLSI logic applications. ICICDT (2012)
Felice Crupi, Massimo Alioto, Jacopo Franco, Paolo Magnone, Mitsuhiro Togo, N. Horiguchi, Guido Groeseneken
Understanding the Basic Advantages of Bulk FinFETs for Sub- and Near-Threshold Logic Circuits From Device Measurements. IEEE Trans. Circuits Syst. II Express Briefs (7) (2012)
Luca Magnelli, Felice Crupi, Pasquale Corsonello, Calogero Pace, Giuseppe Iannaccone
A 2.6 nW, 0.45 V Temperature-Compensated Subthreshold CMOS Voltage Reference. IEEE J. Solid State Circuits 46 (2) (2011)
Paolo Magnone, Felice Crupi, Massimo Alioto, Ben Kaczer, Brice De Jaeger
Understanding the Potential and the Limits of Germanium pMOSFETs for VLSI Circuits From Experimental Measurements. IEEE Trans. Very Large Scale Integr. Syst. 19 (9) (2011)
Felice Crupi, Massimo Alioto, Jacopo Franco, Paolo Magnone, Ben Kaczer, Guido Groeseneken, Jérôme Mitard, Liesbeth Witters, Thomas Y. Hoffmann
Experimental analysis of buried SiGe pMOSFETs from the perspective of aggressive voltage scaling. ISCAS (2011)
Paolo Magnone, Felice Crupi, Massimo Alioto, Ben Kaczer
Experimental study of leakage-delay trade-off in Germanium pMOSFETs for logic circuits. ISCAS (2010)
Gino Giusi, Calogero Pace, Felice Crupi
Cross-correlation-based trans-impedance amplifier for current noise measurements. Int. J. Circuit Theory Appl. 37 (6) (2009)
Gino Giusi, Felice Crupi, Calogero Pace, Paolo Magnone
Full Model and Characterization of Noise in Operational Amplifier. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2009)
Calogero Pace, Gino Giusi, Felice Crupi, Salvatore Lombardo
Detection and Classification of Single-Electron Jumps in Si Nanocrystal Memories. IEEE Trans. Instrum. Meas. 57 (2) (2008)
Paolo Magnone, Calogero Pace, Felice Crupi, Gino Giusi
Low frequency noise in nMOSFETs with subnanometer EOT hafnium-based gate dielectrics. Microelectron. Reliab. 47 (12) (2007)
Paolo Srinivasan, Felice Crupi, Eddy Simoen, Paolo Magnone, Calogero Pace, Durga Misra, Cor Claeys
Interfacial layer quality effects on low-frequency noise (1/f) in p-MOSFETs with advanced gate stacks. Microelectron. Reliab. 47 (4-5) (2007)
Carmine Ciofi, Felice Crupi, Calogero Pace, Graziella Scandurra, Maurizio Patane
A New Circuit Topology for the Realization of Very Low-Noise Wide-Bandwidth Transimpedance Amplifier. IEEE Trans. Instrum. Meas. 56 (5) (2007)
Carmine Ciofi, Felice Crupi, Calogero Pace, Graziella Scandurra
How to enlarge the bandwidth without increasing the noise in OP-AMP-based transimpedance amplifier. IEEE Trans. Instrum. Meas. 55 (3) (2006)
Felice Crupi, Gino Giusi, Carmine Ciofi, Calogero Pace
Enhanced sensitivity cross-correlation method for voltage noise measurements. IEEE Trans. Instrum. Meas. 55 (4) (2006)
A. Nannipieri, Giuseppe Iannaccone, Felice Crupi
Extraction of the trap distribution responsible for SILCs in MOS structures from the measurements and simulations of DC and noise properties. Microelectron. Reliab. 44 (9-11) (2004)
Calogero Pace, Carmine Ciofi, Felice Crupi
Very low-noise, high-accuracy programmable voltage reference. IEEE Trans. Instrum. Meas. 52 (4) (2003)
Carmine Ciofi, Felice Crupi, Calogero Pace, Graziella Scandurra
Micro-prober for wafer-level low-noise measurements in MOS devices. IEEE Trans. Instrum. Meas. 52 (5) (2003)
Carmine Ciofi, Felice Crupi, Calogero Pace
A new method for high-sensitivity noise measurements. IEEE Trans. Instrum. Meas. 51 (4) (2002)