Surya Narayanan

Publication Activity (10 Years)

Years Active: 2011-2022
Publications (10 Years): 6

Top Topics

Embedded Processors

Data Parallelism

Top Venues

Conf. Computing Frontiers

PARMA-DITAM@HiPEAC

Publications

Sumanth Gudaparthi, Sarabjeet Singh, Surya Narayanan, Rajeev Balasubramonian, Visvesh Sathe
CANDLES: Channel-Aware Novel Dataflow-Microarchitecture Co-Design for Low Energy Sparse Neural Network Acceleration. HPCA (2022)
Surya Narayanan, Karl Taht, Rajeev Balasubramonian, Edouard Giacomin, Pierre-Emmanuel Gaillardon
SpinalFlow: An Architecture and Dataflow Tailored for Spiking Neural Networks. ISCA (2020)
Sumanth Gudaparthi, Surya Narayanan, Rajeev Balasubramonian, Edouard Giacomin, Hari Kambalasubramanyam, Pierre-Emmanuel Gaillardon
Wire-Aware Architecture and Dataflow for CNN Accelerators. MICRO (2019)
Sumanth Gudaparthi, Surya Narayanan, Rajeev Balasubramonian
Moving CNN Accelerator Computations Closer to Data. EMC2@ASPLOS (2018)
Karl Taht, Surya Narayanan, Rajeev Balasubramonian
A Case for Dynamic Activation Quantization in CNNs. EMC2@ASPLOS (2018)
Surya Narayanan, Ali Shafiee, Rajeev Balasubramonian
INXS: Bridging the throughput and energy gap for spiking neural networks. IJCNN (2017)
Surya Narayanan, Bharath Narasimha Swamy, André Seznec
An empirical high level performance model for future many-cores. Conf. Computing Frontiers (2015)
Surya Narayanan, André Seznec
Sequential and Parallel Code Sections are Different: they may require different Processors. PARMA-DITAM@HiPEAC (2015)
Surya Narayanan, Bharath Narasimha Swamy, André Seznec
Impact of Serial Scaling of Multi-threaded Programs in Many-Core Era. SBAC-PAD (Workshops) (2014)
Surya Narayanan, Ludovic Devaux, Daniel Chillet, Sébastien Pillement, Ioannis Sourdis
Communication service for hardware tasks executed on dynamic and partial reconfigurable resources. VLSI-SoC (2011)
Surya Narayanan, Daniel Chillet, Sébastien Pillement, Ioannis Sourdis
Hardware OS Communication Service and Dynamic Memory Management for RSoCs. ReConFig (2011)