Roselyne Chotin-Avot

Publication Activity (10 Years)

Years Active: 2006-2019
Publications (10 Years): 7

Top Venues

ReConFig

NEWCAS

MWSCAS

Microprocess. Microsystems

Pierre and Marie Curie University, Paris, France (PHD)

Education History

Pierre and Marie Curie University, Paris, France

PHD

Publications

Julian Leonhard, Muhammad Yasin, Shadi Turk, Mohammed Thari Nabeel, Marie-Minerve Louërat, Roselyne Chotin-Avot, Hassan Aboushady, Ozgur Sinanoglu, Haralampos-G. D. Stratigopoulos
MixLock: Securing Mixed-Signal Circuits via Logic Locking. DATE (2019)
Umer Farooq, Roselyne Chotin-Avot, Muhammad Moazam Azeem, Maminionja Ravoson, Habib Mehrez
Novel architectural space exploration environment for multi-FPGA based prototyping systems. Microprocess. Microsystems 56 (2018)
Karim M. Abdellatif, Roselyne Chotin-Avot, Habib Mehrez
AES-GCM and AEGIS: Efficient and High Speed Hardware Implementations. J. Signal Process. Syst. 88 (1) (2017)
Karim M. Abdellatif, Roselyne Chotin-Avot, Habib Mehrez
AEGIS-Based Efficient Solution for Secure Reconfiguration of FPGAs. CS2@HiPEAC (2016)
Muhammad Moazam Azeem, Roselyne Chotin-Avot, Umer Farooq, Maminionja Ravoson, Habib Mehrez
Multiple FPGAs based prototyping and debugging with complete design flow. IDT (2016)
Umer Farooq, Roselyne Chotin-Avot, Muhammad Moazam Azeem, Maminionja Ravoson, Mariem Turki, Habib Mehrez
Inter-FPGA routing environment for performance exploration of multi-FPGA systems. RSP (2016)
Umer Farooq, Roselyne Chotin-Avot, Muhammad Moazam Azeem, Zouha Cherif, Maminionja Ravoson, Saqib Khan, Habib Mehrez
Using Timing-Driven Inter-FPGA Routing for Multi-FPGA Prototyping Exploration. DSD (2016)
Karim M. Abdellatif, Roselyne Chotin-Avot, Habib Mehrez
FPGA-Based High Performance AES-GCM Using Efficient Karatsuba Ofman Algorithm. ARC (2014)
Adrien Blanchardon, Roselyne Chotin-Avot, Habib Mehrez, Emna Amouri
Impact of defect tolerance techniques on the criticality of a SRAM-based mesh of cluster FPGA. ReConFig (2014)
Karim M. Abdellatif, Roselyne Chotin-Avot, Habib Mehrez
Low cost solutions for secure remote reconfiguration of FPGAs. Int. J. Embed. Syst. 6 (2/3) (2014)
Jung Kyu Chae, Paul Mougeat, Jean-Arnaud Francois, Roselyne Chotin-Avot, Habib Mehrez
A reference-based specification tool for creating reliable library development specifications. NEWCAS (2014)
Karim M. Abdellatif, Roselyne Chotin-Avot, Habib Mehrez
Authenticated encryption on FPGAs from the static part to the reconfigurable part. Microprocess. Microsystems 38 (6) (2014)
Saif-Ur Rehman, Adrien Blanchardon, Arwa Ben Dhia, Mounir Benabdenbi, Roselyne Chotin-Avot, Lirida A. B. Naviner, Lorena Anghel, Habib Mehrez, Emna Amouri, Zied Marrakchi
Impact of Cluster Size on Routability, Testability and Robustness of a Cluster in a Mesh FPGA. ISVLSI (2014)
Karim M. Abdellatif, Roselyne Chotin-Avot, Zied Marrakchi, Habib Mehrez, Qingshan Tang
Towards high performance GHASH for pipelined AES-GCM using FPGAs (abstract only). FPGA (2014)
Adrien Blanchardon, Roselyne Chotin-Avot, Habib Mehrez, Emna Amouri
Improve defect tolerance in a cluster of a SRAM-based Mesh of Cluster FPGA using hardware redundancy. FPL (2014)
Karim M. Abdellatif, Roselyne Chotin-Avot, Habib Mehrez
Efficient AES-GCM for VPNs using FPGAs. MWSCAS (2013)
Karim M. Abdellatif, Roselyne Chotin-Avot, Habib Mehrez
High speed authenticated encryption for slow changing key applications using reconfigurable devices. Wireless Days (2013)
Arwa Ben Dhia, Saif-Ur Rehman, Adrien Blanchardon, Lirida A. B. Naviner, Mounir Benabdenbi, Roselyne Chotin-Avot, Emna Amouri, Habib Mehrez, Zied Marrakchi
A defect-tolerant cluster in a mesh SRAM-based FPGA. FPT (2013)
Karim M. Abdellatif, Roselyne Chotin-Avot, Habib Mehrez
Protecting FPGA bitstreams using authenticated encryption. NEWCAS (2013)
Jung Kyu Chae, Severine Bertrand, Pierre-Francois Ollagnon, Paul Mougeat, Jean-Arnaud Francois, Roselyne Chotin-Avot, Habib Mehrez
Efficient state-dependent power model for multi-bit flip-flop banks. MWSCAS (2013)
Emna Amouri, Adrien Blanchardon, Roselyne Chotin-Avot, Habib Mehrez, Zied Marrakchi
Efficient multilevel interconnect topology for cluster-based mesh FPGA architecture. ReConFig (2013)
Sophie Belloeil-Dupuis, Roselyne Chotin-Avot, Habib Mehrez
Exploring redundant arithmetics in computer-aided design of arithmetic datapaths. Integr. 46 (2) (2013)
Karim M. Abdellatif, Roselyne Chotin-Avot, Habib Mehrez
Improved method for parallel AES-GCM cores using FPGAs. ReConFig (2013)
Karim M. Abdellatif, Roselyne Chotin-Avot, Habib Mehrez
Lightweight and compact solutions for secure reconfiguration of FPGAs. ReConFig (2013)
Jung Kyu Chae, Paul Mougeat, Jean-Arnaud Francois, Roselyne Chotin-Avot, Habib Mehrez
A formalism of the specifications for library development. SoCC (2013)
Karim M. Abdellatif, Roselyne Chotin-Avot, Habib Mehrez
Efficient parallel-pipelined GHASH for message authentication. ReConFig (2012)
Sophie Belloeil-Dupuis, Roselyne Chotin-Avot, Habib Mehrez
Stratus: Free design of highly parametrized VLSI modules interoperable with commercial tools. ISQED (2011)
Sophie Belloeil, Roselyne Chotin-Avot, Habib Mehrez
Arithmetic Data Path Optimization Using Borrow-Save Representation. ISVLSI (2008)
Alain Greiner, Frédéric Pétrot, M. Carrier, Mounir Benabdenbi, Roselyne Chotin-Avot, Raphaël Labayrade
MP-SoC Architecture for an Obstacle Detection Application in Pre-Crash Situation. ReCoSoC (2006)

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Publication Activity (10 Years)

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Roselyne Chotin-Avot