Haralampos-G. D. Stratigopoulos

Publication Activity (10 Years)

Years Active: 2003-2021
Publications (10 Years): 26

Top Topics

Special Session

Extreme Value Theory

Analog Circuits

Top Venues

IEEE Trans. Comput. Aided Des. Integr. Circuits Syst.

Publications

Julian Leonhard, Mohamed Elshamy, Marie-Minerve Louërat, Haralampos-G. D. Stratigopoulos
Breaking Analog Biasing Locking Techniques via Re-Synthesis. ASP-DAC (2021)
Julian Leonhard, Alhassan Sayed, Marie-Minerve Louërat, Hassan Aboushady, Haralampos-G. D. Stratigopoulos
Analog and Mixed-Signal IC Security via Sizing Camouflaging. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 40 (5) (2021)
Mohamed Elshamy, Alhassan Sayed, Marie-Minerve Louërat, Amine Rhouni, Hassan Aboushady, Haralampos-G. D. Stratigopoulos
Securing Programmable Analog ICs Against Piracy. DATE (2020)
Antonios Pavlidis, Marie-Minerve Louërat, Eric Faehn, Anand Kumar, Haralampos-G. D. Stratigopoulos
Symmetry-based A/M-S BIST (SymBIST): Demonstration on a SAR ADC IP. DATE (2020)
Sarah A. El-Sayed, Theofilos Spyrou, Antonios Pavlidis, Engin Afacan, Luis A. Camuñas-Mesa, Bernabé Linares-Barranco, Haralampos-G. D. Stratigopoulos
Spiking Neuron Hardware-Level Fault Modeling. IOLTS (2020)
Mohamed Elshamy, Giorgio Di Natale, Antonios Pavlidis, Marie-Minerve Louërat, Haralampos-G. D. Stratigopoulos
Hardware Trojan Attacks in Analog/Mixed-Signal ICs via the Test Access Mechanism. ETS (2020)
Sarah A. El-Sayed, Luis A. Camuñas-Mesa, Bernabé Linares-Barranco, Haralampos-G. D. Stratigopoulos
Self-Testing Analog Spiking Neuron Circuit. SMACD (2019)
Ghada Sokar, Yassien Zakaria, Asmaa Rabie, Kareem Madkour, Ira Leventhal, Jochen Rivoir, Xinli Gu, Haralampos-G. D. Stratigopoulos
IP Session on Machine Learning Applications in IC Test-Related Tasks. VTS (2019)
Julian Leonhard, Muhammad Yasin, Shadi Turk, Mohammed Thari Nabeel, Marie-Minerve Louërat, Roselyne Chotin-Avot, Hassan Aboushady, Ozgur Sinanoglu, Haralampos-G. D. Stratigopoulos
MixLock: Securing Mixed-Signal Circuits via Logic Locking. DATE (2019)
Julian Leonhard, Marie-Minerve Louërat, Hassan Aboushady, Ozgur Sinanoglu, Haralampos-G. D. Stratigopoulos
Mixed-Signal Hardware Security Using MixLock: Demonstration in an Audio Application. SMACD (2019)
Haralampos-G. D. Stratigopoulos, Christian Streitwieser
Adaptive Test With Test Escape Estimation for Mixed-Signal ICs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 37 (10) (2018)
Yiorgos Makris, Amit Nahar, Haralampos-G. D. Stratigopoulos, Marc Hutner
Special session on machine learning: How will machine learning transform test? VTS (2018)
Haralampos-G. D. Stratigopoulos
Machine learning applications in IC testing. ETS (2018)
Naohiko Shimizu, Junichi Akita, Marie-Minerve Louërat, Haralampos-G. D. Stratigopoulos, Jean-Paul Chaput, Dimitri Galayko
Open Source Hardware and EDA Tools for Analog/Mixed-Signal Design and Prototyping. ISCAS (2018)
Ali Ahmadi, Haralampos-G. D. Stratigopoulos, Ke Huang, Amit Nahar, Bob Orr, Michael Pas, John M. Carulli, Yiorgos Makris
Yield Forecasting Across Semiconductor Fabrication Plants and Design Generations. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 36 (12) (2017)
Maria K. Michael, Rolf Drechsler, Stephan Eggersglüß, Haralampos-G. D. Stratigopoulos, Sybille Hellebrand, Rob Aitken
Foreword. ETS (2017)
Haralampos-G. D. Stratigopoulos, Christian Streitwieser
Adaptive test flow for mixed-signal ICs. VTS (2017)
Maria K. Michael, Haralampos-G. D. Stratigopoulos
Recap of the European Test Symposium 2017 (ETS'17). IEEE Des. Test 34 (6) (2017)
Nicola Nicolici, Haralampos-G. D. Stratigopoulos
Guest Editors' Introduction: Top Papers from the 2015 International Test Conference. IEEE Des. Test 33 (6) (2016)
Ali Ahmadi, Haralampos-G. D. Stratigopoulos, Amit Nahar, Bob Orr, Michael Pas, Yiorgos Makris
Harnessing fabrication process signature for predicting yield across designs. ISCAS (2016)
Athanasios Dimakos, Haralampos-G. D. Stratigopoulos, Alexandre Siligaris, Salvador Mir, Emeric de Foucauld
Built-in test of millimeter-Wave circuits based on non-intrusive sensors. DATE (2016)
Said Hamdioui, Giorgio Di Natale, Bram Kruseman, Maria K. Michael, Haralampos-G. D. Stratigopoulos
ETS 2016 foreword. ETS (2016)
Manuel J. Barragan, Rshdee Alhakim, Haralampos-G. D. Stratigopoulos, Matthieu Dubois, Salvador Mir, Hervé Le Gall, Neha Bhargava, Ankur Bal
A Fully-Digital BIST Wrapper Based on Ternary Test Stimuli for the Dynamic Test of a 40 nm CMOS 18-bit Stereo Audio ΣΔ ADC. IEEE Trans. Circuits Syst. I Regul. Pap. (11) (2016)
Martin Andraud, Haralampos-G. D. Stratigopoulos, Emmanuel Simeu
One-Shot Non-Intrusive Calibration Against Process Variations for Analog/RF Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. (11) (2016)
Manuel J. Barragan, Haralampos-G. D. Stratigopoulos, Salvador Mir, Hervé Le Gall, Neha Bhargava, Ankur Bal
Practical Simulation Flow for Evaluating Analog/Mixed-Signal Test Techniques. IEEE Des. Test 33 (6) (2016)
Guillaume Renaud, Manuel J. Barragan, Asma Laraba, Haralampos-G. D. Stratigopoulos, Salvador Mir, Hervé Le Gall, Hervé Naudet
A 65nm CMOS Ramp Generator Design and its Application Towards a BIST Implementation of the Reduced-Code Static Linearity Test Technique for Pipeline ADCs. J. Electron. Test. 32 (4) (2016)
Athanasios Dimakos, Haralampos-G. D. Stratigopoulos, Alexandre Siligaris, Salvador Mir, Emeric de Foucauld
Parametric Built-In Test for 65nm RF LNA Using Non-Intrusive Variation-Aware Sensors. J. Electron. Test. 31 (4) (2015)
Athanasios Dimakos, Martin Andraud, Louay Abdallah, Haralampos-G. D. Stratigopoulos, Emmanuel Simeu, Salvador Mir
Test and Calibration of RF Circuits Using Built-in Non-intrusive Sensors. ISVLSI (2015)
John Liaperdos, Haralampos-G. D. Stratigopoulos, Louay Abdallah, Yiorgos Tsiatouhas, Angela Arapoyanni, Xin Li
Fast deployment of alternate analog test using Bayesian model fusion. DATE (2015)
Asma Laraba, Haralampos-G. D. Stratigopoulos, Salvador Mir, Hervé Naudet
Exploiting Pipeline ADC Properties for a Reduced-Code Linearity Test Technique. IEEE Trans. Circuits Syst. I Regul. Pap. (10) (2015)
Ali Ahmadi, Haralampos-G. D. Stratigopoulos, Amit Nahar, Bob Orr, Michael Pas, Yiorgos Makris
Yield Forecasting in Fab-to-Fab Production Migration Based on Bayesian Model Fusion. ICCAD (2015)
Haralampos-G. D. Stratigopoulos, Manuel J. Barragan, Salvador Mir, Hervé Le Gall, Neha Bhargava, Ankur Bal
Evaluation of low-cost mixed-signal test techniques for circuits with long simulation times. ITC (2015)
Hervé Le Gall, Rshdee Alhakim, Miroslav Valka, Salvador Mir, Haralampos-G. D. Stratigopoulos, Emmanuel Simeu
High frequency jitter estimator for SoCs. ETS (2015)
Haralampos-G. D. Stratigopoulos, Stephen Sunter
Fast Monte Carlo-Based Estimation of Analog Parametric Test Metrics. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 33 (12) (2014)
Ayssar Serhan, Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir
Low-cost EVM built-in test of RF transceivers. IDT (2014)
Martin Andraud, Anthony Deluthault, Mouhamadou Dieng, Florence Azaïs, Serge Bernard, Philippe Cauvet, Mariane Comte, Thibault Kervaon, Vincent Kerzerho, Salvador Mir, Paul-Henri Pugliesi-Conti, Michel Renovell, Fabien Soulier, Emmanuel Simeu, Haralampos-G. D. Stratigopoulos
Solutions for the self-adaptation of communicating systems in operation. IOLTS (2014)
Haralampos-G. D. Stratigopoulos, Stephen Sunter
Efficient Monte Carlo-based analog parametric fault modelling. VTS (2014)
Josep Altet, Eduardo Aldrete-Vidrio, Ferran Reverter, Didac Gómez, José Luis González, Marvin Onabajo, José Silva-Martínez, B. Martineau, X. Perpiñà, Louay Abdallah, Haralampos-G. D. Stratigopoulos, Xavier Aragonès, Xavier Jordà, Miquel Vellvehí, Stefan Dilhaire, Salvador Mir, Diego Mateo
Review of temperature sensors as monitors for RF-MMW built-in testing and self-calibration schemes. MWSCAS (2014)
Martin Andraud, Haralampos-G. D. Stratigopoulos, Emmanuel Simeu
One-Shot Calibration of RF Circuits Based on Non-Intrusive Sensors. DAC (2014)
Matthieu Dubois, Haralampos-G. D. Stratigopoulos, Salvador Mir, Manuel J. Barragan
Evaluation of digital ternary stimuli for dynamic test of ΣΔ ADCs. VLSI-SoC (2014)
Matthieu Dubois, Haralampos-G. D. Stratigopoulos, Salvador Mir, Manuel J. Barragan
Statistical Evaluation of Digital Techniques for $\sum\varDelta$ ADC BIST. VLSI-SoC (Selected Papers) (2014)
Asma Laraba, Haralampos-G. D. Stratigopoulos, Salvador Mir, Hervé Naudet, Gerard Bret
Reduced code linearity testing of pipeline adcs in the presence of noise. VTS (2013)
Haralampos-G. D. Stratigopoulos, Pierre Faubet, Yoann Courant, Firas Mohamed
Multidimensional analog test metrics estimation using extreme value theory and statistical blockade. DAC (2013)
Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir
True non-intrusive sensors for RF built-in test. ITC (2013)
Asma Laraba, Haralampos-G. D. Stratigopoulos, Salvador Mir, Hervé Naudet, Gerard Bret
Reduced-Code Linearity Testing of Pipeline ADCs. IEEE Des. Test 30 (6) (2013)
Ke Huang, Haralampos-G. D. Stratigopoulos, Louay Abdallah, Salvador Mir, Ahcène Bounceur
Multivariate statistical techniques for analog parametric test metrics estimation. DTIS (2013)
Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir, Josep Altet
Defect-oriented non-intrusive RF test using on-chip temperature sensors. VTS (2013)
Ke Huang, Haralampos-G. D. Stratigopoulos, Salvador Mir
Fault modeling and diagnosis for nanometric analog circuits. ITC (2013)
Haralampos-G. D. Stratigopoulos, Alberto Valdes-Garcia
Guest Editors' Introduction: Digitally Enhanced Wireless Transceivers. IEEE Des. Test Comput. 29 (6) (2012)
Haralampos-G. D. Stratigopoulos
Test Metrics Model for Analog Test Development. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 31 (7) (2012)
Ke Huang, Haralampos-G. D. Stratigopoulos, Salvador Mir, Camelia Hora, Yizi Xing, Bram Kruseman
Diagnosis of Local Spot Defects in Analog Circuits. IEEE Trans. Instrum. Meas. 61 (10) (2012)
Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir, Josep Altet
Testing RF circuits with true non-intrusive built-in sensors. DATE (2012)
Asma Laraba, Haralampos-G. D. Stratigopoulos, Salvador Mir, Hervé Naudet, Christophe Forel
Enhanced reduced code linearity test technique for multi-bit/stage pipeline ADCs. ETS (2012)
Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir, Christophe Kelma
Experiences with non-intrusive sensors for RF built-in test. ITC (2012)
Haralampos-G. D. Stratigopoulos, Salvador Mir
Adaptive Alternate Analog Test. IEEE Des. Test Comput. 29 (4) (2012)
Dimitri de Jonghe, Elie Maricau, Georges G. E. Gielen, Trent McConaghy, Bratislav Tasic, Haralampos-G. D. Stratigopoulos
Advances in variation-aware modeling, verification, and testing of analog ICs. DATE (2012)
Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir, Christophe Kelma
RF Front-End Test Using Built-in Sensors. IEEE Des. Test Comput. 28 (6) (2011)
Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir
Implicit test of high-speed analog circuits using non-intrusive sensors. ECCTD (2011)
Alexios Spyronasios, Louay Abdallah, Haralampos-G. D. Stratigopoulos, Salvador Mir
On Replacing an RF Test with an Alternative Measurement: Theory and a Case Study. Asian Test Symposium (2011)
Nathan Kupp, Haralampos-G. D. Stratigopoulos, Petros Drineas, Yiorgos Makris
On proving the efficiency of alternative RF tests. ICCAD (2011)
Ahcène Bounceur, Salvador Mir, Haralampos-G. D. Stratigopoulos
Estimation of Analog Parametric Test Metrics Using Copulas. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 30 (9) (2011)
Haralampos-G. D. Stratigopoulos, Krishnendu Chakrabarty
Guest Editorial. J. Electron. Test. 27 (3) (2011)
Louay Abdallah, Haralampos-G. D. Stratigopoulos, Christophe Kelma, Salvador Mir
Sensors for built-in alternate RF test. ETS (2010)
Haralampos-G. D. Stratigopoulos
Special session 12A: Panel adaptive analog test: Feasibility and opportunities ahead. VTS (2010)
Haralampos-G. D. Stratigopoulos
Special session 8A: TTTC 2010 E. J. McCluskey Best Doctoral Thesis Award. VTS (2010)
Dzmitry Maliuk, Haralampos-G. D. Stratigopoulos, He Huang, Yiorgos Makris
Analog neural network design for RF built-in self-test. ITC (2010)
Ke Huang, Haralampos-G. D. Stratigopoulos, Salvador Mir
Bayesian Fault Diagnosis of RF Circuits Using Nonparametric Density Estimation. Asian Test Symposium (2010)
Dzmitry Maliuk, Haralampos-G. D. Stratigopoulos, Yiorgos Makris
An analog VLSI multilayer perceptron and its application towards built-in self-test in analog circuits. IOLTS (2010)
Haralampos-G. D. Stratigopoulos
Special session 4C: Thesis research poster session. VTS (2010)
Salvador Mir, Haralampos-G. D. Stratigopoulos, Ahcène Bounceur
Density estimation for analog/RF test problem solving. VTS (2010)
Haralampos-G. D. Stratigopoulos, Salvador Mir, Erkan Acar, Sule Ozev
Defect filter for alternate RF test. ETS (2010)
Haralampos-G. D. Stratigopoulos, Salvador Mir
Analog test metrics estimates with PPM accuracy. ICCAD (2010)
Ke Huang, Haralampos-G. D. Stratigopoulos, Salvador Mir
Fault diagnosis of analog circuits based on machine learning. DATE (2010)
Haralampos-G. D. Stratigopoulos, Petros Drineas, Mustapha Slamani, Yiorgos Makris
RF Specification Test Compaction Using Learning Machines. IEEE Trans. Very Large Scale Integr. Syst. 18 (6) (2010)
Matthieu Dubois, Haralampos-G. D. Stratigopoulos, Salvador Mir
Hierarchical parametric test metrics estimation: A ΣΔ converter BIST case study. ICCD (2009)
Haralampos-G. D. Stratigopoulos, Salvador Mir, Erkan Acar, Sule Ozev
Defect Filter for Alternate RF Test. ETS (2009)
Yiorgos Makris, Haralampos-G. D. Stratigopoulos
Special Session 7C: TTTC 2009 Best Doctoral Thesis Contest. VTS (2009)
Haralampos-G. D. Stratigopoulos, Salvador Mir, Yiorgos Makris
Enrichment of limited training sets in machine-learning-based analog/RF test. DATE (2009)
Haralampos-G. D. Stratigopoulos, Salvador Mir, Ahcène Bounceur
Evaluation of Analog/RF Test Measurements at the Design Stage. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 28 (4) (2009)
James Dardig, Haralampos-G. D. Stratigopoulos, Eric Stern, Mark A. Reed, Yiorgos Makris
A Statistical Approach to Characterizing and Testing Functionalized Nanowires. VTS (2008)
Haralampos-G. D. Stratigopoulos, Yiorgos Makris
Error Moderation in Low-Cost Machine-Learning-Based Analog/RF Testing. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 27 (2) (2008)
Haralampos-G. D. Stratigopoulos, Jeanne Tongbong, Salvador Mir
A General Method to Evaluate RF BIST Techniques Based on Non-parametric Density Estimation. DATE (2008)
Haralampos-G. D. Stratigopoulos, Petros Drineas, Mustapha Slamani, Yiorgos Makris
Non-RF to RF Test Correlation Using Learning Machines: A Case Study. VTS (2007)
Haralampos-G. D. Stratigopoulos, Yiorgos Makris
Concurrent detection of erroneous responses in linear analog circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 25 (5) (2006)
Haralampos-G. D. Stratigopoulos, Yiorgos Makris
Bridging the Accuracy of Functional and Machine-Learning-Based Mixed-Signal Testing. VTS (2006)
Haralampos-G. D. Stratigopoulos, Yiorgos Makris
An adaptive checker for the fully differential analog code. IEEE J. Solid State Circuits 41 (6) (2006)
Haralampos-G. D. Stratigopoulos, Yiorgos Makris
Nonlinear decision boundaries for testing analog circuits. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24 (11) (2005)
Haralampos-G. D. Stratigopoulos, Yiorgos Makris
Generating decision regions in analog measurement spaces. ACM Great Lakes Symposium on VLSI (2005)
Haralampos-G. D. Stratigopoulos, Yiorgos Makris
Constructive Derivation of Analog Specification Test Criteria. VTS (2005)
Haralampos-G. D. Stratigopoulos, Yiorgos Makris
An Analog Checker with Input-Relative Tolerance for Duplicate Signals. J. Electron. Test. 20 (5) (2004)
Haralampos-G. D. Stratigopoulos, Yiorgos Makris
An Analog Checker with Dynamically Adjustable Error Threshold for Fully Differential Circuits. VTS (2003)
Haralampos-G. D. Stratigopoulos, Yiorgos Makris
Concurrent Error Detection in Linear Analog Circuits Using State Estimation. ITC (2003)
Haralampos-G. D. Stratigopoulos, Yiorgos Makris
An Analog Checker With Input-Relative Tolerance for Duplicate Signals. IOLTS (2003)