José Luis González

Publication Activity (10 Years)

Years Active: 2001-2023
Publications (10 Years): 2

Top Topics

Thermal Imaging

Spatial Filtering

Relevant Literature

High Temperature

Top Venues

IEEE Wirel. Commun.

Microelectron. J.

Publications

Nouhaila Rzaik, Cédric Dehos, Mykhailo Zarudniev, Alexandre Siligaris, José Luis González
Minimum Signal-To-Noise Ratio For High Classification Radar Accuracy. ICECS (2023)
Antonio De Domenico, Robin Gerzaguet, Nicolas Cassiau, Antonio Clemente, Raffaele D'Errico, Cedric Dehos, José Luis González, Dimitri Ktenas, L. Manat, Valentin Savin, Alexandre Siligaris
Industry Perspectives. IEEE Wirel. Commun. 24 (4) (2017)
José Luis González, Vincent Puyal, Alexandre Siligaris, Clement Jany, Cedric Dehos
A 45GHz/55GHz LO frequency selector for E-band transceivers based on switchable injection locked-oscillators in BiCMOS 55nm. ESSCIRC (2015)
Josep Altet, José Luis González, Didac Gómez, Xavier Perpiñà, Wilfrid Claeys, Stéphane Grauby, Cédric Dufis, Miquel Vellvehí, Diego Mateo, Ferran Reverter, Stefan Dilhaire, Xavier Jordà
Electro-thermal characterization of a differential temperature sensor in a 65 nm CMOS IC: Applications to gain monitoring in RF amplifiers. Microelectron. J. 45 (5) (2014)
Josep Altet, Eduardo Aldrete-Vidrio, Ferran Reverter, Didac Gómez, José Luis González, Marvin Onabajo, José Silva-Martínez, B. Martineau, X. Perpiñà, Louay Abdallah, Haralampos-G. D. Stratigopoulos, Xavier Aragonès, Xavier Jordà, Miquel Vellvehí, Stefan Dilhaire, Salvador Mir, Diego Mateo
Review of temperature sensors as monitors for RF-MMW built-in testing and self-calibration schemes. MWSCAS (2014)
Cedric Dehos, José Luis González, Antonio De Domenico, Dimitri Ktenas, Laurent Dussopt
Millimeter-wave access and backhauling: the solution to the exponential data traffic increase in 5G mobile communications systems? IEEE Commun. Mag. 52 (9) (2014)
Marc Molina, Xavier Aragonès, Diego Mateo, José Luis González
Inductor shielding strategies to protect mmW LC-VCOs from high frequency substrate noise. Microelectron. J. 44 (5) (2013)
Didac Gómez, Cédric Dufis, Josep Altet, Diego Mateo, José Luis González
Electro-thermal coupling analysis methodology for RF circuits. Microelectron. J. 43 (9) (2012)
Nathalie Deltimple, José Luis González, Josep Altet, Yohann Luque, Eric Kerherve
Design of a fully integrated CMOS self-testable RF power amplifier using a thermal sensor. ESSCIRC (2012)
José Luis González, Baudouin Martineau, Didier Belot
On the electrical properties of slotted metallic planes in CMOS processes for RF and millimeter-wave applications. Microelectron. J. 43 (8) (2012)
José Luis González, Xavier Aragonès, Marc Molina, Baudouin Martineau, Didier Belot
A comparison between grounded and floating shield inductors for mmW VCOs. ESSCIRC (2010)
Enrique Barajas, Diego Mateo, José Luis González
Behavioural Modelling of DLLs for Fast Simulation and Optimisation of Jitter and Power Consumption. DSD (2010)
Marc Molina, Xavier Aragonès, José Luis González
Experimental analysis of substrate isolation techniques for RF-SOC integration. SoCC (2009)
Laura Moreno, Didac Gómez, José Luis González, Diego Mateo, Xavier Aragonès, Roc Berenguer, Héctor Solar
A low-power RF front-end for 2.5 GHz receivers. ISCAS (2008)
Enrique Barajas, R. Cosculluela, D. Coutinho, Diego Mateo, José Luis González, I. Cairò, S. Banda, M. Ikeda
Interactive presentation: Behavioral modeling of delay-locked loops and its application to jitter optimization in ultra wide-band impulse radio systems. DATE (2007)
Josep Altet, Diego Mateo, José Luis González, Eduardo Aldrete-Vidrio
Observation of high-frequency analog/RF electrical circuit characteristics by on-chip thermal measurements. ISCAS (2006)
Miguel A. Méndez, José Luis González, Diego Mateo, Antonio Rubio
An investigation on the relation between digital circuitry characteristics and power supply noise spectrum in mixed-signal CMOS integrated circuits. Microelectron. J. 36 (1) (2005)
Johan Lambie, Francesc Moll Echeto, José Luis González, Antonio Rubio
Asynchronous pulse logic cell for threshold logic and Boolean networks. ISCAS (1) (2005)
Enrique Barajas, Luis Elvira, Miguel A. Méndez, Ferran Martorell, Diego Mateo, José Luis González
Discrete and continuous substrate noise spectrum dependence on digital circuit characteristics. ISCAS (5) (2005)
Miguel A. Méndez, Diego Mateo, Xavier Aragonès, José Luis González
Phase noise degradation of LC-tank VCOs due to substrate noise and package coupling. ESSCIRC (2005)
Tomás Lahoz, Enrique Barajas, José Luis González
Characterization and noise analysis of a 12-bit current steering digital-to-analog converter. ISCAS (1) (2005)
Luis Elvira, Ferran Martorell, Xavier Aragonès, José Luis González
A physical-based noise macromodel for fast simulation of switching noise generation. Microelectron. J. 35 (8) (2004)
José Luis González, Toni Cortes
Increasing the capacity of RAID5 by online gradual assimilation. SNAPI@PACT (2004)
Miquel Albiol, José Luis González, Eduard Alarcón
Mismatch and dynamic modeling of current sources in current-steering CMOS D/A converters: an extended design procedure. IEEE Trans. Circuits Syst. I Regul. Pap. (1) (2004)
Luis Elvira, Ferran Martorell, Xavier Aragonès, José Luis González
A Macromodelling Methodology for Efficient High-Level Simulation of Substrate Noise Generation. DATE (2004)
Miquel Albiol, José Luis González, Eduard Alarcón
Improved current-source sizing for high-speed high-accuracy current steering D/A converters. ISCAS (1) (2003)
Miquel Albiol, José Luis González, Eduard Alarcón
Improved Design Methodology for High-Speed High-Accuracy Current Steering D/A Converters. DATE (2003)
Xavier Aragonès, José Luis González, Francesc Moll, Antonio Rubio
Noise Generation and Coupling Mechanisms in Deep-Submicron ICs. IEEE Des. Test Comput. 19 (5) (2002)
José Luis González, Eduard Alarcón
Clock-jitter induced distortion in high speed CMOS switched-current segmented digital-to-analog converters. ISCAS (1) (2001)