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Clock-jitter induced distortion in high speed CMOS switched-current segmented digital-to-analog converters.
José Luis González
Eduard Alarcón
Published in:
ISCAS (1) (2001)
Keyphrases
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high speed
low power
mixed signal
circuit design
focal plane
cmos image sensor
analog vlsi
real time
wide dynamic range
cmos technology
high speed networks
analog to digital converter
frame rate
power consumption
single chip
dynamic range
data conversion
structure from motion
delta sigma