Francisco Veirano

Publication Activity (10 Years)

Years Active: 2013-2024
Publications (10 Years): 14

Top Topics

Digital Circuits

Energy Efficient

Power Management

Top Venues

IEEE Trans. Circuits Syst. I Regul. Pap.

J. Low Power Electron.

IEEE Trans. Biomed. Circuits Syst.

Publications

Leandro Díaz, Julia Azziz, Juan P. Oliver, Francisco Veirano
Low-Power Wireless Sensor Network for Real-Time Indoor Air Quality Monitoring with CO2 Sensors. LASCAS (2024)
Santiago Martínez, Francisco Veirano, Timothy G. Constandinou, Fernando Silveira
Low Output Voltage Closed-Loop Current Source for Neural Stimulation. LASCAS (2024)
Santiago Martínez, Francisco Veirano, Timothy G. Constandinou, Fernando Silveira
Trends in Volumetric-Energy Efficiency of Implantable Neurostimulators: A Review From a Circuits and Systems Perspective. IEEE Trans. Biomed. Circuits Syst. 17 (1) (2023)
Pablo Perez-Nicoli, Francisco Veirano, Fernando Silveira
A Compact Lithium-Ion Battery Charger for Low-Power Applications. IEEE Trans. Circuits Syst. II Express Briefs 69 (3) (2022)
Francisco Veirano, Pablo Perez-Nicoli, Nicolás Gammarano, German Fierro, Fernando Silveira
Near threshold pulse transit time processor for central blood pressure estimation. LASCAS (2022)
Francisco Veirano, Lirida A. B. Naviner, Fernando Silveira
Optimal asymmetrical back plane biasing for energy efficient digital circuits in 28 nm UTBB FD-SOI. Integr. 65 (2019)
Francisco Veirano, Pablo Perez-Nicoli, Pablo Castro-Lisboa, Fernando Silveira
Gate drive losses reduction in switched-capacitor DC-DC converters. LASCAS (2018)
Francisco Veirano, Fernando Silveira, Lirida A. B. Naviner
Asymmetrical length biasing for energy efficient digital circuits. LASCAS (2017)
Francisco Veirano, Lirida A. B. Naviner, Fernando Silveira
Optimum nMOS/pMOS Imbalance for Energy Efficient Digital Circuits. IEEE Trans. Circuits Syst. I Regul. Pap. (12) (2017)
Juan P. Oliver, Francisco Veirano, Diego A. Bouvier, Eduardo I. Boemo
A Low Cost System for Self Measurements of Power Consumption in Field Programmable Gate Arrays. J. Low Power Electron. 13 (1) (2017)
Francisco Veirano, Fernando Silveira, Lirida A. B. Naviner
Minimum Operating Voltage Due to Intrinsic Noise in Subthreshold Digital Logic in Nanoscale CMOS. J. Low Power Electron. 12 (1) (2016)
Francisco Veirano, Lirida A. B. Naviner, Fernando Silveira
Pushing minimum energy limits by optimal asymmetrical back plane biasing in 28 nm UTBB FD-SOI. PATMOS (2016)
Pablo Castro-Lisboa, Pablo Perez-Nicoli, Francisco Veirano, Fernando Silveira
General Top/Bottom-Plate Charge Recycling Technique for Integrated Switched Capacitor DC-DC Converters. IEEE Trans. Circuits Syst. I Regul. Pap. (4) (2016)
Pablo Perez-Nicoli, Francisco Veirano, Pablo Castro-Lisboa, Fernando Silveira
High slew-rate OTA with low quiescent current based on non-linear current mirror. LASCAS (2015)
Francisco Veirano, Pablo Perez-Nicoli, Sebastian Besio, Pablo Castro-Lisboa, Fernando Silveira
Ultra low power pulse generator based on a ring oscillator with direct path current avoidance. LASCAS (2013)