Ming Ling

Publication Activity (10 Years)

Years Active: 2012-2024
Publications (10 Years): 49

Top Topics

Level Parallelism

Top Venues

IEEE Trans. Very Large Scale Integr. Syst.

Publications

Shan Shen, Hao Xu, Yongliang Zhou, Ming Ling, Wenjian Yu
Ultra8T: A sub-threshold 8T SRAM with leakage detection. Integr. 98 (2024)
Ming Ling, Zihao Feng, Zizhen Chen, Yanping Lan, Xinhong Li, Haotian You, Xiaowen Han, Jianjun Chen
Evaluation of driving effects of carbon storage change in the source of the Yellow River: A perspective with CMIP6 future development scenarios. Ecol. Informatics 83 (2024)
Xinhong Li, Jianjun Chen, Zizhen Chen, Yanping Lan, Ming Ling, Qinyi Huang, Hucheng Li, Xiaowen Han, Shuhua Yi
Explainable machine learning-based fractional vegetation cover inversion and performance optimization - A case study of an alpine grassland on the Qinghai-Tibet Plateau. Ecol. Informatics 82 (2024)
Fang Jiang, Fei Tong, Hongyu Wang, Xiaoyu Cheng, Zhe Zhou, Ming Ling, Yuxing Mao
PCG: Mitigating Conflict-based Cache Side-channel Attacks with Prefetching. CoRR (2024)
Zizhen Chen, Jianjun Chen, Yuemin Yue, Yanping Lan, Ming Ling, Xinhong Li, Haotian You, Xiaowen Han, Guoqing Zhou
Tradeoffs among multi-source remote sensing images, spatial resolution, and accuracy for the classification of wetland plant species and surface objects based on the MRS_DeepLabV3+ model. Ecol. Informatics 81 (2024)
Chao Wang, Yali Yang, Hao Chen, Sha Xu, Yongfang Li, Ruoping Zhang, Ming Ling
Fatigue life prediction driven by mesoscopic defect data. Eng. Appl. Artif. Intell. 131 (2024)
Wenzhen Zhang, Ming Ling
An improved point cloud denoising method in adverse weather conditions based on PP-LiteSeg network. PeerJ Comput. Sci. 10 (2024)
Ji Ding, Shidi Tang, Zheming Mei, Lingyue Wang, Qinqin Huang, Haifeng Hu, Ming Ling, Jiansheng Wu
Vina-GPU 2.0: Further Accelerating AutoDock Vina and Its Derivatives with Graphics Processing Units. J. Chem. Inf. Model. 63 (7) (2023)
Fan Yang, Zheng Qing, Ming Ling, Wa An
A New Process Framework for Managing the Fuzzy Front End of New Healthcare Device Development. HCI (24) (2023)
Ming Ling, Qingde Lin, Ruiqi Chen, Haimeng Qi, Mengru Lin, Yanxiang Zhu, Jiansheng Wu
Vina-FPGA: A Hardware-Accelerated Molecular Docking Tool With Fixed-Point Quantization and Low-Level Parallelism. IEEE Trans. Very Large Scale Integr. Syst. 31 (4) (2023)
Leilei Jin, Jiajie Xu, Wenjie Fu, Hao Yan, Xiao Shi, Ming Ling, Longxing Shi
A Novel Delay Calibration Method Considering Interaction between Cells and Wires. DATE (2023)
Shan Shen, Peng Cao, Ming Ling, Longxing Shi
A Timing Yield Model for SRAM Cells at Sub/Near-Threshold Voltages Based on a Compact Drain Current Model. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 42 (4) (2023)
Shan Shen, Hao Xu, Yongliang Zhou, Ming Ling, Wenjian Yu
Ultra8T: A Sub-Threshold 8T SRAM with Leakage Detection. CoRR (2023)
Xingxing Zhou, Ming Ling, Qingde Lin, Shidi Tang, Jiansheng Wu, Haifeng Hu
Effectiveness Analysis of Multiple Initial States Simulated Annealing Algorithm, a Case Study on the Molecular Docking Tool AutoDock Vina. IEEE ACM Trans. Comput. Biol. Bioinform. 20 (6) (2023)
Peng Tu, Xu Xie, Ming Ling, Min Yang, Guo AI, Yawen Huang, Yefeng Zheng
FemtoDet: An Object Detection Baseline for Energy Versus Performance Tradeoffs. CoRR (2023)
Ming Ling, Hongxi Li, Xiang Yu
A Quantitative Analysis and Optimization on the Cache Behavior Influenced by Literal Pools. IEEE Embed. Syst. Lett. 14 (2) (2022)
Leilei Jin, Wenjie Fu, Ming Ling, Longxing Shi
A Fast Cross-Layer Dynamic Power Estimation Method by Tracking Cycle-Accurate Activity Factors With Spark Streaming. IEEE Trans. Very Large Scale Integr. Syst. 30 (4) (2022)
Shan Shen, Peng Cao, Ming Ling, Longxing Shi
A Timing Yield Model for SRAM Cells in Sub/Near-threshold Voltages Based on A Compact Drain Current Model. CoRR (2022)
Ming Ling, Qingde Lin, Ke Tan, Tianxiang Shao, Shan Shen, Jun Yang
A Design of Timing Speculation SRAM-Based L1 Caches With PVT Autotracking Under Near-Threshold Voltages. IEEE Trans. Very Large Scale Integr. Syst. 29 (12) (2021)
Yang Xiao, Ming Ling, Zhenming Liang, Jian Ding, Shi Zhan, Hai Hu, Bin Chen
Dual fluoroscopic imaging and CT-based finite element modelling to estimate forces and stresses of grafts in anatomical single-bundle ACL reconstruction with different femoral tunnels. Int. J. Comput. Assist. Radiol. Surg. 16 (3) (2021)
Ming Ling, Xiaoqian Lu, Guangmin Wang, Jiancong Ge
Analytical Modeling the Multi-Core Shared Cache Behavior With Considerations of Data-Sharing and Coherence. IEEE Access 9 (2021)
Junkai Xu, Fangyuan Cao, Shi Zhan, Ming Ling, Hai Hu, Peter B. Shull
Mapping-Based Dosage of Gait Modification Selection for Multi-Parameter, Subject-Specific Gait Retraining. IEEE Access 8 (2020)
Shan Shen, Liang Pang, Tianxiang Shao, Ming Ling, Xiao Shi, Longxing Shi
TYMER: A Yield-based Performance Model for Timing-speculation SRAM. DAC (2020)
Wenjie Fu, Ming Ling, Wei Wang, Longxing Shi
AMPS: Accelerating McPAT Power Evaluation Without Cycle-Accurate Simulations. IEEE Embed. Syst. Lett. 12 (1) (2020)
Shan Shen, Tianxiang Shao, Ming Ling, Jun Yang, Longxing Shi
Modeling and Designing of a PVT Auto-tracking Timing-speculative SRAM. DATE (2020)
Ming Ling, Guangmin Wang, Jiancong Ge, Xiaoqian Lu
Analytical Modeling the Multi-Core Shared Cache Behavior with Considerations of Data-Sharing and Coherence. CoRR (2020)
Ming Ling, Jiancong Ge, Guangmin Wang
Fast modeling L2 cache reuse distance histograms using combined locality information from software traces. J. Syst. Archit. 108 (2020)
Wenjie Fu, Leilei Jin, Ming Ling, Yu Zheng, Longxing Shi
A Cross-Layer Power and Timing Evaluation Method for Wide Voltage Scaling. DAC (2020)
Wenjie Fu, Leilei Jin, Ming Ling, Yu Zheng, Longxing Shi
VASTA: A Wide Voltage Statistical Timing Analysis Tool Based on Variation-Aware Cell Delay Models. IEEE Access 8 (2020)
Shan Shen, Tianxiang Shao, Xiaojing Shang, Yichen Guo, Ming Ling, Jun Yang, Longxing Shi
TS Cache: A Fast Cache With Timing-Speculation Mechanism Under Low Supply Voltages. IEEE Trans. Very Large Scale Integr. Syst. 28 (1) (2020)
Li Yang, Zhi Qi, Zeheng Liu, Hao Liu, Ming Ling, Longxing Shi, Xinning Liu
An embedded implementation of CNN-based hand detection and orientation estimation algorithm. Mach. Vis. Appl. 30 (6) (2019)
Yunhao Yan, Ming Ling
Accelerating the Analytical Modeling of Memory Level Parallelism by the Probability Analysis. PACRIM (2019)
Ming Ling, Xiaojing Shang, Shan Shen, Tianxiang Shao, Jun Yang
Lowering the Hit Latencies of Low Voltage Caches Based on the Cross-Sensing Timing Speculation SRAM. IEEE Access 7 (2019)
Ming Ling, Xiaojing Shang, Kecheng Ji, Longxing Shi
Fast modeling DRAM access latency based on the LLC memory stride distribution without detailed simulations. Microprocess. Microsystems 64 (2019)
Ming Ling, Xin Xu, Yushen Gu, Zhihua Pan
Does the ISA Really Matter? A Simulation Based Investigation. PACRIM (2019)
Xiaojing Shang, Ming Ling, Shan Shen, Tianxiang Shao, Jun Yang
RRS cache: a low voltage cache based on timing speculation SRAM with a reuse-aware cacheline remapping mechanism. MEMSYS (2019)
Jiancong Ge, Ming Ling
Fast Modeling of the L2 Cache Reuse Distance Histograms from Software Traces. ISPASS (2019)
Guangmin Wang, Jiancong Ge, Yunhao Yan, Ming Ling
A Data-Sharing Aware and Scalable Cache Miss Rates Model for Multi-Core Processors with Multi-Level Cache Hierarchies. ICPADS (2019)
Shan Shen, Tianxiang Shao, Xiaojing Shang, Yichen Guo, Ming Ling, Jun Yang, Longxing Shi
TS Cache: A Fast Cache with Timing-speculation Mechanism Under Low Supply Voltages. CoRR (2019)
Ming Ling, Jiancong Ge, Guangmin Wang
Fast Modeling L2 Cache Reuse Distance Histograms Using Combined Locality Information from Software Traces. CoRR (2019)
Wenjie Fu, Yu Zheng, Leilei Jin, Ming Ling
A Fast Reduction Method for Path Process Variations Without Time-Consuming Training. ASICON (2019)
Kaiyang Liu, Jun Peng, Liang He, Jianping Pan, Shuo Li, Ming Ling, Zhiwu Huang
An Active Mobile Charging and Data Collection Scheme for Clustered Sensor Networks. IEEE Trans. Veh. Technol. 68 (5) (2019)
Kecheng Ji, Ming Ling, Longxing Shi, Jianping Pan
An Analytical Cache Performance Evaluation Framework for Embedded Out-of-Order Processors Using Software Characteristics. ACM Trans. Embed. Comput. Syst. 17 (4) (2018)
Shan Shen, Ming Ling, Yongtao Zhang, Longxing Shi
Detecting the phase behavior on cache performance using the reuse distance vectors. J. Syst. Archit. 90 (2018)
Kecheng Ji, Ming Ling, Longxing Shi
Using the first-level cache stack distance histograms to predict multi-level LRU cache misses. Microprocess. Microsystems 55 (2017)
Kecheng Ji, Ming Ling, Qin Wang, Longxing Shi, Jianping Pan
AFEC: An analytical framework for evaluating cache performance in out-of-order processors. DATE (2017)
Kecheng Ji, Ming Ling, Yang Zhang, Longxing Shi
An artificial neural network model of LRU-cache misses on out-of-order embedded processors. Microprocess. Microsystems 50 (2017)
Qin Wang, Kecheng Ji, Ming Ling, Longxing Shi
A mechanistic model of memory level parallelism fed with cache miss rates. PACRIM (2017)
Fengying Sun, Kecheng Ji, Ming Ling, Longxing Shi
A trace-driven analytical model with less profiling overhead for DRAM access latencies. PACRIM (2017)
Jianping Wu, Ming Ling, Yang Zhang, Chen Mei, Huan Wang
A novel energy-oriented reconfigurable on-chip unified memory architecture based on Cache Behavior Phase Graph. ASICON (2013)
Jianping Wu, Ming Ling, Yang Zhang, Chen Mei, Huan Wang
Dynamic Allocation of SPM Based on Time-Slotted Cache Conflict Graph for System Optimization. IEICE Trans. Inf. Syst. (8) (2012)