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A Bi-Directional, Zero-Latency Adaptive Clocking Circuit in a 28-nm Wide AVFS System.
Weiwei Shan
Wentao Dai
Liang Wan
Minyi Lu
Longxing Shi
Mingoo Seok
Jun Yang
Published in:
IEEE J. Solid State Circuits (2020)
Keyphrases
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bi directional
circuit design
english chinese
wide range
high speed
associative memory
low latency
cmos technology
motion estimation
prefetching
low voltage
nm technology