An Energy-Efficient Time-Domain Binary Neural Network Accelerator with Error-Detection in 28nm CMOS.
Yuxuan DuXinchao ShangWeiwei ShanPublished in: APCCAS (2020)
Keyphrases
- error detection
- neural network
- error correcting
- error correction
- error recovery
- cmos technology
- wireless sensor networks
- data cleansing
- artificial neural networks
- power consumption
- fault tolerance
- silicon on insulator
- error control
- error resilient
- energy efficient
- frequency domain
- high speed
- fault isolation
- low power
- sensor networks
- nm technology
- energy efficiency
- neural network model
- fuzzy logic
- parallel implementation
- back propagation
- circuit design
- power supply
- fault diagnosis
- low cost
- analog vlsi