Xiyuan Tang

Publication Activity (10 Years)

Years Active: 2015-2024
Publications (10 Years): 90

Top Topics

Quantization Noise

Noise Cancellation

Design Space Exploration

Top Venues

IEEE J. Solid State Circuits

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Mingtao Zhan, Lu Jie, Xiyuan Tang, Yi Zhong, Nan Sun
200-MS/s Pipelined SAR ADC With kT/C Noise Cancellation and Robust Ring-Amp. IEEE J. Solid State Circuits 59 (7) (2024)
Bingyang Liu, Haoyi Zhang, Xiaohan Gao, Zichen Kong, Xiyuan Tang, Yibo Lin, Runsheng Wang, Ru Huang
LayoutCopilot: An LLM-powered Multi-agent Collaborative Framework for Interactive Analog Layout Design. CoRR (2024)
Haoyi Zhang, Xiaohan Gao, Zilong Shen, Jiahao Song, Xiaoxu Cheng, Xiyuan Tang, Yibo Lin, Runsheng Wang, Ru Huang
SAGERoute 2.0: Hierarchical Analog and Mixed Signal Routing Considering Versatile Routing Scenarios. DATE (2024)
Xin Qiao, Jiahao Song, Youming Yang, Renjie Wei, Xiyuan Tang, Meng Li, Runsheng Wang, Yuan Wang
MixCIM: A Hybrid-Cell-Based Computing-in-Memory Macro with Less-Data-Movement and Activation-Memory-Reuse for Depthwise Separable Neural Networks. CICC (2024)
Xin Qiao, Qingyu Guo, Xiyuan Tang, Jiahao Song, Renjie Wei, Meng Li, Runsheng Wang, Yuan Wang
A 16.38TOPS and 4.55POPS/W SRAM Computing-in-Memory Macro for Signed Operands Computation and Batch Normalization Implementation. IEEE Trans. Circuits Syst. I Regul. Pap. 71 (4) (2024)
Jiahao Song, Zihan Wu, Xiyuan Tang, Bocheng Xu, Haoyang Luo, Youming Yang, Yuan Wang, Runsheng Wang, Ru Huang
30.5 A Variation-Tolerant In-eDRAM Continuous-Time Ising Machine Featuring 15-Level Coefficients and Leaked Negative-Feedback Annealing. ISSCC (2024)
Zilong Shen, Jiaiun Tang, Haoyang Luo, Zhongyi Wu, Zongnan Wang, Xing Zhang, Xiyuan Tang, Yuan Wang
A 181.8dB FoMs Zoom Capacitance-to-Digital Converter with kT/C Noise Cancellation and Dead Band Operation. CICC (2024)
Haikang Diao, Haoyang Luo, Jiahao Song, Bocheng Xu, Runsheng Wang, Yuan Wang, Xiyuan Tang
A 28nm 128TFLOPS/W Computing-In-Memory Engine Supporting One-Shot Floating-Point NN Inference and On-Device Fine-Tuning for Edge AI. CICC (2024)
Jiahao Song, Xiyuan Tang, Haoyang Luo, Haoyi Zhang, Xin Qiao, Zixuan Sun, Xiangxing Yang, Zihan Wu, Yuan Wang, Runsheng Wang, Ru Huang
A 4-bit Calibration-Free Computing-In-Memory Macro With 3T1C Current-Programed Dynamic-Cascode Multi-Level-Cell eDRAM. IEEE J. Solid State Circuits 59 (3) (2024)
Haoyi Zhang, Jiahao Song, Xiaohan Gao, Xiyuan Tang, Yibo Lin, Runsheng Wang, Ru Huang
EasyACIM: An End-to-End Automated Analog CIM with Synthesizable Architecture and Agile Design Space Exploration. CoRR (2024)
Zilong Shen, Xiyuan Tang, Zhongyi Wu, Haoyang Luo, Zongnan Wang, Mingjie Liu, Xing Zhang, Yuan Wang
A 9.7fJ/Conv.-Step Capacitive Sensor Readout Circuit with Incremental Zoomed Time Domain Quantization. CICC (2023)
Jiahao Song, Xiyuan Tang, Xin Qiao, Yuan Wang, Runsheng Wang, Ru Huang
A 28 nm 16 Kb Bit-Scalable Charge-Domain Transpose 6T SRAM In-Memory Computing Macro. IEEE Trans. Circuits Syst. I Regul. Pap. 70 (5) (2023)
Xiyuan Tang, Xiangxing Yang, Jiaxin Liu, Zongnan Wang, Wei Shi, David Z. Pan, Nan Sun
A Bandwidth-Adaptive Pipelined SAR ADC With Three-Stage Cascoded Floating Inverter Amplifier. IEEE J. Solid State Circuits 58 (9) (2023)
Xiangxing Yang, Keren Zhu, Xiyuan Tang, Meizhi Wang, Mingtao Zhan, Nanshu Lu, Jaydeep P. Kulkarni, David Z. Pan, Yongpan Liu, Nan Sun
An In-Memory-Computing Charge-Domain Ternary CNN Classifier. IEEE J. Solid State Circuits 58 (5) (2023)
Haoyi Zhang, Xiaohan Gao, Haoyang Luo, Jiahao Song, Xiyuan Tang, Junhua Liu, Yibo Lin, Runsheng Wang, Ru Huang
SAGERoute: Synergistic Analog Routing Considering Geometric and Electrical Constraints with Manual Design Compatibility. DATE (2023)
Yi Zhong, Mingtao Zhan, Wei Wang, Xiyuan Tang, Lu Jie, Nan Sun
An 80.2-to-89.1dB-SNDR 24k-to-200kHz-BW VCO-Based Synthesized ?S ADC with 105dB SFDR in 28-nm CMOS. CICC (2023)
Yifan He, Haikang Diao, Chen Tang, Wenbin Jia, Xiyuan Tang, Yuan Wang, Jinshan Yue, Xueqing Li, Huazhong Yang, Hongyang Jia, Yongpan Liu
A 28nm 38-to-102-TOPS/W 8b Multiply-Less Approximate Digital SRAM Compute-In-Memory Macro for Neural-Network Inference. ISSCC (2023)
Xin Xin, Linxiao Shen, Xiyuan Tang, Yi Shen, Jueping Cai, Xingyuan Tong, Nan Sun
A Power-Efficient 13-Tap FIR Filter and an IIR Filter Embedded in a 10-Bit SAR ADC. IEEE Trans. Circuits Syst. I Regul. Pap. 70 (6) (2023)
Xiao Han, Xiyuan Tang, Zibo Ma, Xinzi Xu, Yanxing Suo, Qiao Cai, Yang Zhao
An NS-SAR ADC with Full-bit High-order Mismatch Shaped CDAC. ISCAS (2023)
Jiahao Song, Xiyuan Tang, Haoyang Luo, Haoyi Zhang, Xin Qiao, Zixuan Sun, Xiangxing Yang, Yuan Wang, Runsheng Wang, Ru Huang
A Calibration-Free 15-level/Cell eDRAM Computing-in-Memory Macro with 3T1C Current-Programmed Dynamic-Cascoded MLC achieving 233-to-304-TOPS/W 4b MAC. CICC (2023)
Zongnan Wang, Lu Jie, Zichen Kong, Mingtao Zhan, Yi Zhong, Yuan Wang, Xiyuan Tang
A 150kHz-BW 15-ENOB Incremental Zoom ADC with Skipped Sampling and Single Buffer Embedded Noise-Shaping SAR Quantizer. ISSCC (2023)
Mingtao Zhan, Lu Jie, Xiyuan Tang, Nan Sun
200MS/S Pipelined SAR ADC with kT/C Noise Cancellation and Robust Ring-Amp. ISSCC (2022)
Keren Zhu, Hao Chen, Mingjie Liu, Xiyuan Tang, Wei Shi, Nan Sun, David Z. Pan
Generative-Adversarial-Network-Guided Well-Aware Placement for Analog Circuits. ASP-DAC (2022)
Xin Qiao, Jiahao Song, Xiyuan Tang, Haoyang Luo, Nanbing Pan, Xiaoxin Cui, Runsheng Wang, Yuan Wang
A 65 nm 73 kb SRAM-Based Computing-In-Memory Macro With Dynamic-Sparsity Controlling. IEEE Trans. Circuits Syst. II Express Briefs 69 (6) (2022)
Yi Shen, Xiyuan Tang, Xin Xin, Shubin Liu, Zhangming Zhu, Nan Sun
A 10-bit 100-MS/s SAR ADC With Always-On Reference Ripple Cancellation. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (10) (2022)
Xiyuan Tang, Jiaxin Liu, Yi Shen, Shaolan Li, Linxiao Shen, Arindam Sanyal, Kareem Ragab, Nan Sun
Low-Power SAR ADC Design: Overview and Survey of State-of-the-Art Techniques. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (6) (2022)
Xiao Han, Xiyuan Tang, Yanxing Suo, Qiao Cai, Xinzi Xu, Tianwei Wan, Yang Zhao
A Vector Pair Based DWA Algorithm for Linearity Enhancement of CDACs in the NS-SAR ADC. APCCAS (2022)
Wei Shi, Xing Wang, Xiyuan Tang, Abhishek Mukherjee, Raviteja Theertham, Shanthi Pavan, Lu Jie, Nan Sun
-order Vector-Quantizer DEM. CICC (2022)
Lu Jie, Mingtao Zhan, Xiyuan Tang, Nan Sun
10kHz-BW Zoom-Incremental-Counting ADC Achieving 103dB SNDR and 100dB Full-Scale CMRR. ISSCC (2022)
Jiaxin Liu, Xing Wang, Zijie Gao, Mingtao Zhan, Xiyuan Tang, Chen-Kai Hsu, Nan Sun
A 90-dB-SNDR Calibration-Free Fully Passive Noise-Shaping SAR ADC With 4× Passive Gain and Second-Order DAC Mismatch Error Shaping. IEEE J. Solid State Circuits 56 (11) (2021)
Jiahao Song, Yuan Wang, Xiyuan Tang, Runsheng Wang, Ru Huang
A 16Kb Transpose 6T SRAM In-Memory-Computing Macro based on Robust Charge-Domain Computing. A-SSCC (2021)
Xiyuan Tang, Xiangxing Yang, Jiaxin Liu, Wei Shi, David Z. Pan, Nan Sun
A 0.4-to-40MS/s 75.7dB-SNDR Fully Dynamic Event-Driven Pipelined ADC with 3-Stage Cascoded Floating Inverter Amplifier. ISSCC (2021)
Jiaxin Liu, Dengquan Li, Yi Zhong, Xiyuan Tang, Nan Sun
-Order Noise-Shaping SAR Using Capacitor Stacking and Dynamic Buffering. ISSCC (2021)
Hao Chen, Mingjie Liu, Xiyuan Tang, Keren Zhu, Abhishek Mukherjee, Nan Sun, David Z. Pan
MAGICAL 1.0: An Open-Source Fully-Automated AMS Layout Synthesis Framework Verified With a 40-nm 1GS/s Δ∑ ADC. CICC (2021)
Chen-Kai Hsu, Xiyuan Tang, Jiaxin Liu, Rui Xu, Wenda Zhao, Abhishek Mukherjee, Timothy R. Andeen, Nan Sun
A 77.1-dB-SNDR 6.25-MHz-BW Pipeline SAR ADC With Enhanced Interstage Gain Error Shaping and Quantization Noise Shaping. IEEE J. Solid State Circuits 56 (3) (2021)
Wei Shi, Jiaxin Liu, Abhishek Mukherjee, Xiangxing Yang, Xiyuan Tang, Linxiao Shen, Wenda Zhao, Nan Sun
10.4 A 3.7mW 12.5MHz 81dB-SNDR 4th-Order CTDSM with Single-OTA and 2nd-Order NS-SAR. ISSCC (2021)
Tzu-Han Wang, Ruowei Wu, Vasu Gupta, Xiyuan Tang, Shaolan Li
A 13.8-ENOB Fully Dynamic Third-Order Noise-Shaping SAR ADC in a Single-Amplifier EF-CIFF Structure With Hardware-Reusing kT/C Noise Cancellation. IEEE J. Solid State Circuits 56 (12) (2021)
Hao Chen, Mingjie Liu, Biying Xu, Keren Zhu, Xiyuan Tang, Shaolan Li, Yibo Lin, Nan Sun, David Z. Pan
MAGICAL: An Open- Source Fully Automated Analog IC Layout System from Netlist to GDSII. IEEE Des. Test 38 (2) (2021)
Xiangxing Yang, Keren Zhu, Xiyuan Tang, Meizhi Wang, Mingtao Zhan, Nanshu Lu, Jaydeep P. Kulkarni, David Z. Pan, Yongpan Liu, Nan Sun
An In-Memory-Computing Charge-Domain Ternary CNN Classifier. CICC (2021)
Abhishek Mukherjee, Miguel Gandara, Xiangxing Yang, Linxiao Shen, Xiyuan Tang, Chen-Kai Hsu, Nan Sun
A 74.5-dB Dynamic Range 10-MHz BW CT-ΔΣ ADC With Distributed-Input VCO and Embedded Capacitive-π Network in 40-nm CMOS. IEEE J. Solid State Circuits 56 (2) (2021)
Mingjie Liu, Xiyuan Tang, Keren Zhu, Hao Chen, Nan Sun, David Z. Pan
OpenSAR: An Open Source Automated End-to-end SAR ADC Compiler. ICCAD (2021)
Jiahao Song, Yuan Wang, Minguang Guo, Xiang Ji, Kaili Cheng, Yixuan Hu, Xiyuan Tang, Runsheng Wang, Ru Huang
TD-SRAM: Time-Domain-Based In-Memory Computing Macro for Binary Neural Networks. IEEE Trans. Circuits Syst. I Regul. Pap. 68 (8) (2021)
Yi Zhong, Xiyuan Tang, Jiaxin Liu, Wenda Zhao, Shaolan Li, Nan Sun
An 81.5dB-DR 1.25MHz-BW VCO-Based CT ΔΣ ADC with Double-PFD Quantizer. CICC (2021)
Hao Chen, Keren Zhu, Mingjie Liu, Xiyuan Tang, Nan Sun, David Z. Pan
Universal Symmetry Constraint Extraction for Analog and Mixed-Signal Circuits with Graph Neural Networks. DAC (2021)
Mingjie Liu, Keren Zhu, Jiaqi Gu, Linxiao Shen, Xiyuan Tang, Nan Sun, David Z. Pan
Towards Decrypting the Art of Analog Layout: Placement Quality Prediction via Transfer Learning. DATE (2020)
Chen-Kai Hsu, Xiyuan Tang, Wenda Zhao, Rui Xu, Abhishek Mukherjee, Timothy R. Andeen, Nan Sun
A 77.1-dB 6.25-MHz-BW Pipeline SAR ADC with Enhanced Interstage Gain Error Shaping and Quantization Error Shaping. CICC (2020)
Yuxuan Huang, Qinghang Zhao, Xiyuan Tang, Fang Su, Nan Sun, Huazhong Yang, Yongpan Liu
An Energy-Efficient Flexible Capacitive Pressure Sensing System. ISCAS (2020)
Jiaxin Liu, Xiyuan Tang, Wenda Zhao, Linxiao Shen, Nan Sun
40MS/s SAR ADC with kT/C Noise Cancellation. ISSCC (2020)
Hao Chen, Keren Zhu, Mingjie Liu, Xiyuan Tang, Nan Sun, David Z. Pan
Toward Silicon-Proven Detailed Routing for Analog and Mixed-Signal Circuits. ICCAD (2020)
Xin Xin, Linxiao Shen, Xiyuan Tang, Yi Shen, Jueping Cai, Nan Sun
A Power-Efficient 13-Tap FIR filter and an IIR Filter Embedded in a 10-bit SAR ADC. A-SSCC (2020)
Mingjie Liu, Keren Zhu, Xiyuan Tang, Biying Xu, Wei Shi, Nan Sun, David Z. Pan
Closing the Design Loop: Bayesian Optimization Assisted Hierarchical Analog Layout Synthesis. DAC (2020)
Wenda Zhao, Shaolan Li, Biying Xu, Xiangxing Yang, Xiyuan Tang, Linxiao Shen, Nanshu Lu, David Z. Pan, Nan Sun
0.8-V 78.5-dB SNDR VCO-Based Sensor Readout Circuit in a Hybrid PLL- ΔΣ M Structure. IEEE J. Solid State Circuits 55 (3) (2020)
Yanlong Zhang, Arindam Sanyal, Xueyi Yu, Xing Quan, Kailin Wen, Xiyuan Tang, Gang Jin, Li Geng, Nan Sun
PLL With Space-Time Averaging for Quantization Noise Reduction. IEEE J. Solid State Circuits 55 (3) (2020)
Xiyuan Tang, Shaolan Li, Xiangxing Yang, Linxiao Shen, Wenda Zhao, Randall P. Williams, Jiaxin Liu, Zhichao Tan, Neal A. Hall, David Z. Pan, Nan Sun
An Energy-Efficient Time-Domain Incremental Zoom Capacitance-to-Digital Converter. IEEE J. Solid State Circuits 55 (11) (2020)
Zhelu Li, Arnab Dutta, Abhishek Mukherjee, Xiyuan Tang, Linxiao Shen, Lenian He, Nan Sun
A SAR ADC with Reduced kT/C Noise by Decoupling Noise PSD and BW. VLSI Circuits (2020)
Yi Zhong, Shaolan Li, Xiyuan Tang, Linxiao Shen, Wenda Zhao, Siliang Wu, Nan Sun
A Second-Order Purely VCO-Based CT ΔΣ ADC Using a Modified DPLL Structure in 40-nm CMOS. IEEE J. Solid State Circuits 55 (2) (2020)
Keren Zhu, Hao Chen, Mingjie Liu, Xiyuan Tang, Nan Sun, David Z. Pan
Effective Analog/Mixed-Signal Circuit Placement Considering System Signal Flow. ICCAD (2020)
Mingjie Liu, Wuxi Li, Keren Zhu, Biying Xu, Yibo Lin, Linxiao Shen, Xiyuan Tang, Nan Sun, David Z. Pan
DET: Detecting System Symmetry Constraints for Analog Circuits with Graph Similarity. ASP-DAC (2020)
Jiaxin Liu, Xing Wang, Zijie Gao, Mingtao Zhan, Xiyuan Tang, Nan Sun
-Order Mismatch Error Shaping. ISSCC (2020)
Xiyuan Tang, Linxiao Shen, Begum Kasap, Xiangxing Yang, Wei Shi, Abhishek Mukherjee, David Z. Pan, Nan Sun
An Energy-Efficient Comparator With Dynamic Floating Inverter Amplifier. IEEE J. Solid State Circuits 55 (4) (2020)
Yi Shen, Xiyuan Tang, Linxiao Shen, Wenda Zhao, Xin Xin, Shubin Liu, Zhangming Zhu, Visvesh Sathe, Nan Sun
A 10-bit 120-MS/s SAR ADC With Reference Ripple Cancellation Technique. IEEE J. Solid State Circuits 55 (3) (2020)
Jiaxin Liu, Xiyuan Tang, Wenda Zhao, Linxiao Shen, Nan Sun
40-MS/s SAR ADC With kT/C Noise Cancellation. IEEE J. Solid State Circuits 55 (12) (2020)
Xiyuan Tang, Xiangxing Yang, Wenda Zhao, Chen-Kai Hsu, Jiaxin Liu, Linxiao Shen, Abhishek Mukherjee, Wei Shi, Shaolan Li, David Z. Pan, Nan Sun
A 13.5-ENOB, 107-μW Noise-Shaping SAR ADC With PVT-Robust Closed-Loop Dynamic Amplifier. IEEE J. Solid State Circuits 55 (12) (2020)
Xiyuan Tang, Xiangxing Yang, Wenda Zhao, Chen-Kai Hsu, Jiaxin Liu, Linxiao Shen, Abhishek Mukherjee, Wei Shi, David Z. Pan, Nan Sun
9.5 A 13.5b-ENOB Second-Order Noise-Shaping SAR with PVT-Robust Closed-Loop Dynamic Amplifier. ISSCC (2020)
Xiyuan Tang, Yi Shen, Xin Xin, Shubin Liu, Jueping Cai, Zhangming Zhu, Nan Sun
A 10-Bit 100-MS/s SAR ADC with Always-on Reference Ripple Cancellation. VLSI Circuits (2020)
Jiaxin Liu, Chen-Kai Hsu, Xiyuan Tang, Shaolan Li, Guangjun Wen, Nan Sun
Error-Feedback Mismatch Error Shaping for High-Resolution Data Converters. IEEE Trans. Circuits Syst. I Regul. Pap. (4) (2019)
Xiyuan Tang, Yi Shen, Linxiao Shen, Wenda Zhao, Zhangming Zhu, Visvesh Sathe, Nan Sun
A 10b 120MS/s SAR ADC with Reference Ripple Cancellation Technique. CICC (2019)
Keren Zhu, Mingjie Liu, Yibo Lin, Biying Xu, Shaolan Li, Xiyuan Tang, Nan Sun, David Z. Pan
GeniusRoute: A New Analog Routing Paradigm Using Generative Neural Network Guidance. ICCAD (2019)
Biying Xu, Yibo Lin, Xiyuan Tang, Shaolan Li, Linxiao Shen, Nan Sun, David Z. Pan
WellGAN: Generative-Adversarial-Network-Guided Well Generation for Analog/Mixed-Signal Circuit Layout. DAC (2019)
Shaolan Li, Wenda Zhao, Biying Xu, Xiangxing Yang, Xiyuan Tang, Linxiao Shen, Nanshu Lu, David Z. Pan, Nan Sun
0.8-V 78.5dB-SNDR VCO-Based Sensor Readout Circuit in a Hybrid PLL-ΔΣM Structure. CICC (2019)
Xiyuan Tang, Shaolan Li, Linxiao Shen, Wenda Zhao, Xiangxing Yang, Randy Williams, Jiaxin Liu, Zhichao Tan, Neal A. Hall, Nan Sun
A 16fJ/Conversion-Step Time-Domain Two-Step Capacitance-to-Digital Converter. ISSCC (2019)
Jeonggoo Song, Kareem Ragab, Xiyuan Tang, Nan Sun
A 10-b 600-MS/s 2-Way Time-Interleaved SAR ADC With Mean Absolute Deviation-Based Background Timing-Skew Calibration. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2019)
Yanlong Zhang, Arindam Sanyal, Xing Quan, Kailin Wen, Xiyuan Tang, Gang Jin, Li Geng, Nan Sun
A 2.4-GHz ΔΣ Fractional-N Synthesizer with Space-Time Averaging for Noise Reduction. CICC (2019)
Shaolan Li, Arindam Sanyal, Kyoungtae Lee, Yeonam Yoon, Xiyuan Tang, Yi Zhong, Kareem Ragab, Nan Sun
Advances in Voltage-Controlled-Oscillator-Based ΔΣ ADCs. IEICE Trans. Electron. (7) (2019)
Linxiao Shen, Yi Shen, Xiyuan Tang, Chen-Kai Hsu, Wei Shi, Shaolan Li, Wenda Zhao, Abhishek Mukherjee, Nan Sun
25µW 2MS/s 74dB-SNDR Continuous-Time Pipelined-SAR ADC with 120fF Input Capacitor. ISSCC (2019)
Biying Xu, Keren Zhu, Mingjie Liu, Yibo Lin, Shaolan Li, Xiyuan Tang, Nan Sun, David Z. Pan
MAGICAL: Toward Fully Automated Analog IC Layout Leveraging Human and Machine Intelligence: Invited Paper. ICCAD (2019)
Mohamed Baker Alawieh, Xiyuan Tang, David Z. Pan
-PM: semi-supervised learning for efficient performance modeling of analog and mixed signal circuits. ASP-DAC (2019)
Linxiao Shen, Nan Sun, Yi Shen, Zhelu Li, Wei Shi, Xiyuan Tang, Shaolan Li, Wenda Zhao, Mantian Zhang, Zhangming Zhu
A Two-Step ADC With a Continuous-Time SAR-Based First Stage. IEEE J. Solid State Circuits 54 (12) (2019)
Linxiao Shen, Abhishek Mukherjee, Shaolan Li, Xiyuan Tang, Nanshu Lu, Nan Sun
A 0.6-V Tail-Less Inverter Stacking Amplifier with 0.96 PEF. VLSI Circuits (2019)
Xiyuan Tang, Begum Kasap, Linxiao Shen, Xiangxing Yang, Wei Shi, Nan Sun
An Energy-Efficient Comparator with Dynamic Floating Inverter Pre-Amplifier. VLSI Circuits (2019)
Yi Zhong, Shaolan Li, Arindam Sanyal, Xiyuan Tang, Linxiao Shen, Siliang Wu, Nan Sun
A Second-Order Purely VCO-Based CT Δ∑ ADC Using a Modified DPLL in 40-nm CMOS. A-SSCC (2018)
Jeonggoo Song, Kareem Ragab, Xiyuan Tang, Nan Sun
A 10-b 800-MS/s Time-Interleaved SAR ADC With Fast Variance-Based Timing-Skew Calibration. IEEE J. Solid State Circuits 52 (10) (2017)
Long Chen, Xiyuan Tang, Arindam Sanyal, Yeonam Yoon, Jie Cong, Nan Sun
A 0.7-V 0.6-µW 100-kS/s Low-Power SAR ADC With Statistical Estimation-Based Noise Reduction. IEEE J. Solid State Circuits 52 (5) (2017)
Long Chen, Kareem Ragab, Xiyuan Tang, Jeonggoo Song, Arindam Sanyal, Nan Sun
A 0.95-mW 6-b 700-MS/s Single-Channel Loop-Unrolled SAR ADC in 40-nm CMOS. IEEE Trans. Circuits Syst. II Express Briefs (3) (2017)
Xiyuan Tang, Long Chen, Jeonggoo Song, Nan Sun
A 1.5fJ/conv-step 10b 100kS/s SAR ADC with gain-boosted dynamic comparator. A-SSCC (2017)
Miguel Gandara, Wenjuan Guo, Xiyuan Tang, Long Chen, Yeonam Yoon, Nan Sun
A pipelined SAR ADC reusing the comparator as residue amplifier. CICC (2017)
Jeonggoo Song, Xiyuan Tang, Nan Sun
A 10-b 2b/cycle 300MS/s SAR ADC with a single differential DAC in 40nm CMOS. CICC (2017)
Jeonggoo Song, Kareem Ragab, Xiyuan Tang, Nan Sun
A 10-b 800MS/s time-interleaved SAR ADC with fast timing-skew calibration. A-SSCC (2016)
Xiyuan Tang, Long Chen, Jeonggoo Song, Nan Sun
A 10-b 750µW 200MS/s fully dynamic single-channel SAR ADC in 40nm CMOS. ESSCIRC (2016)
Long Chen, Arindam Sanyal, Ji Ma, Xiyuan Tang, Nan Sun
Comparator common-mode variation effects analysis and its application in SAR ADCs. ISCAS (2016)
Yeonam Yoon, Kyoungtae Lee, Sungjin Hong, Xiyuan Tang, Long Chen, Nan Sun
0.9-mW 71-dB SNDR distributed modular AS ADC with VCO-based integrator and digital DAC calibration. CICC (2015)
Long Chen, Xiyuan Tang, Arindam Sanyal, Yeonam Yoon, Jie Cong, Nan Sun
A 10.5-b ENOB 645 nW 100kS/s SAR ADC with statistical estimation based noise reduction. CICC (2015)