Login / Signup
Yi Shen
ORCID
Publication Activity (10 Years)
Years Active: 2014-2024
Publications (10 Years): 35
Top Topics
Positive Feedback
Analog To Digital Converter
Calibration Method
Synthetic Aperture Radar
Top Venues
IEEE Trans. Circuits Syst. I Regul. Pap.
Microelectron. J.
IEEE Trans. Very Large Scale Integr. Syst.
A-SSCC
</>
Publications
</>
Dengquan Li
,
Longsheng Wang
,
Yi Shen
,
Shubin Liu
,
Zhangming Zhu
A Background Timing Skew Calibration for Time-Interleaved ADCs Based on Frequency Fitness Genetic Algorithm.
IEEE Trans. Instrum. Meas.
73 (2024)
Yun Li
,
Yi Shen
,
Yue Cao
,
Mengtong Wu
,
Li Dang
,
Shubin Liu
,
Ruixue Ding
,
Zhangming Zhu
Power-efficient 12-bit 800 MS/s voltage-time hybrid domain ADC with split TDC in 28 nm CMOS.
Microelectron. J.
151 (2024)
Haolin Han
,
Jinwei Zhang
,
Ruili Ren
,
Yi Shen
,
Shubin Liu
,
Ruixue Ding
A PVT-robust Gm-R-based residue amplifier with folded positive feedback technique.
Microelectron. J.
151 (2024)
Haolin Han
,
Shubin Liu
,
Hongzhi Liang
,
Yi Shen
,
Jianyu Guo
,
Ruili Ren
,
Zhangming Zhu
A Power-Efficient Clock Circuit and Output Serializing Technique Integrated in a 12-bit 10-GS/s ADC.
IEEE Trans. Circuits Syst. I Regul. Pap.
71 (4) (2024)
Dengquan Li
,
Tian Feng
,
Jiale Ding
,
Yi Shen
,
Shubin Liu
,
Zhangming Zhu
A Wideband Input Buffer Based on Cascade Complementary Source Follower.
IEEE Trans. Very Large Scale Integr. Syst.
32 (5) (2024)
Junyan Hao
,
Yi Shen
,
Jin Zhang
,
Yanbo Zhang
,
Shubin Liu
,
Zhangming Zhu
A 14b 180MS/s Pipeline-SAR ADC With Adaptive-Region-Selection Technique and Gain Error Calibration.
IEEE Trans. Circuits Syst. II Express Briefs
71 (1) (2024)
Li Dang
,
Shubin Liu
,
Ruixue Ding
,
Yi Shen
,
Zhangming Zhu
A High Accuracy and Bandwidth Digital Background Calibration Technique for Timing Skew in TI-ADCs.
IEEE Trans. Circuits Syst. I Regul. Pap.
71 (3) (2024)
Hongzhi Liang
,
Shubin Liu
,
Ruixue Ding
,
Yi Shen
,
Dengquan Li
,
Zhangming Zhu
A 4-GS/s 6-Bit Single-Channel TDC-Assisted Hybrid ADC Featuring Power Supply Variation Adaptation for Inter-Stage Gain Error.
IEEE Trans. Circuits Syst. II Express Briefs
71 (1) (2024)
Yi Shen
,
Junyan Hao
,
Shubin Liu
,
Zeshuai An
,
Dengquan Li
,
Ruixue Ding
,
Zhangming Zhu
An 8-bit 1.5-GS/s Two-Step SAR ADC With Embedded Interstage Gain.
IEEE Trans. Very Large Scale Integr. Syst.
31 (11) (2023)
Junyan Hao
,
Yi Shen
,
Angyang Li
,
Min Wang
,
Qing Zou
,
Zheng Qiu
,
Shubin Liu
,
Zhangming Zhu
An offset and gain error calibration method in high-precision SAR ADCs.
Microelectron. J.
139 (2023)
Dengquan Li
,
Xin Zhao
,
Yi Shen
,
Shubin Liu
,
Zhangming Zhu
A 7-bit 3.8-GS/s 2-Way Time-Interleaved 4-bit/Cycle SAR ADC 16× Time-Domain Interpolation in 28-nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
70 (9) (2023)
Yi Shen
,
Jian Liu
,
Chenxi Han
,
Angyang Li
,
Shubin Liu
,
Ruixue Ding
,
Zhangming Zhu
An Energy-Efficient SAR ADC With a Coarse-Fine Bypass Window Technique.
IEEE Trans. Circuits Syst. I Regul. Pap.
70 (1) (2023)
Yi Shen
,
Shubin Liu
,
Yue Cao
,
Haolin Han
,
Hongzhi Liang
,
Zhicheng Dong
,
Dengquan Li
,
Ruixue Ding
,
Zhangming Zhu
A 12b 1.5GS/s Single-Channel Pipelined SAR ADC with a Pipelined Residue Amplification Stage.
CICC
(2023)
Hongzhi Liang
,
Yi Shen
,
Jun Chang
,
Shubin Liu
,
Ruixue Ding
,
Zhangming Zhu
A 5GS/s 38.04dB SNDR Single-Channel TDC-Assisted Hybrid ADC with $\lambda/4$ Transmission Line Based Time Quantizer Achieving a PVT Robustness 416.6fs Time Step.
A-SSCC
(2023)
Yuke Shen
,
Shubin Liu
,
Kui Wen
,
Yanbo Zhang
,
Yi Shen
,
Ruixue Ding
,
Zhangming Zhu
A $142.8-\mu \text{W}$ 98.1dB-SNDR Power/Bandwidth Configurable Fully Dynamic Discrete-Time Zoom ADC with Interstage Leakage Shaping.
A-SSCC
(2023)
Xin Xin
,
Linxiao Shen
,
Xiyuan Tang
,
Yi Shen
,
Jueping Cai
,
Xingyuan Tong
,
Nan Sun
A Power-Efficient 13-Tap FIR Filter and an IIR Filter Embedded in a 10-Bit SAR ADC.
IEEE Trans. Circuits Syst. I Regul. Pap.
70 (6) (2023)
Xin Zhao
,
Dengquan Li
,
Feida Wang
,
Yi Shen
,
Shubin Liu
,
Ruixue Ding
,
Zhangming Zhu
An 8-bit 1.5-GS/s Voltage-Time Hybrid Two-Step ADC With Cross-Coupled Linearized VTC.
IEEE Trans. Very Large Scale Integr. Syst.
31 (12) (2023)
Dengquan Li
,
Lei Zhao
,
Longsheng Wang
,
Yi Shen
,
Zhangming Zhu
A Fast Convergence Second-Order Compensation for Timing Skew in Time-Interleaved ADCs.
IEEE Trans. Very Large Scale Integr. Syst.
30 (10) (2022)
Yukai Huang
,
Jiale Ding
,
Dengquan Li
,
Xin Zhao
,
Shubin Liu
,
Yi Shen
,
Zhangming Zhu
A loop-unrolled assisted 9b 700 MS/s nonbinary 2b/cycle SAR ADC with time-based offset calibration.
Microelectron. J.
122 (2022)
Tian Feng
,
Dengquan Li
,
Jiale Ding
,
Shubin Liu
,
Yi Shen
,
Zhangming Zhu
A Wideband High-linearity Input Buffer Based on Cascade Complementary Source Follower.
ICTA
(2022)
Yi Shen
,
Xiyuan Tang
,
Xin Xin
,
Shubin Liu
,
Zhangming Zhu
,
Nan Sun
A 10-bit 100-MS/s SAR ADC With Always-On Reference Ripple Cancellation.
IEEE Trans. Circuits Syst. I Regul. Pap.
69 (10) (2022)
Jiale Ding
,
Yukai Huang
,
Dengquan Li
,
Shubin Liu
,
Yi Shen
,
Zhangming Zhu
Analysis and Design of a High-Bandwidth Front-End Sampler for Time-Interleaved ADCs.
Circuits Syst. Signal Process.
41 (12) (2022)
Xiyuan Tang
,
Jiaxin Liu
,
Yi Shen
,
Shaolan Li
,
Linxiao Shen
,
Arindam Sanyal
,
Kareem Ragab
,
Nan Sun
Low-Power SAR ADC Design: Overview and Survey of State-of-the-Art Techniques.
IEEE Trans. Circuits Syst. I Regul. Pap.
69 (6) (2022)
Xin Xin
,
Linxiao Shen
,
Xiyuan Tang
,
Yi Shen
,
Jueping Cai
,
Nan Sun
A Power-Efficient 13-Tap FIR filter and an IIR Filter Embedded in a 10-bit SAR ADC.
A-SSCC
(2020)
Yi Shen
,
Xiyuan Tang
,
Linxiao Shen
,
Wenda Zhao
,
Xin Xin
,
Shubin Liu
,
Zhangming Zhu
,
Visvesh Sathe
,
Nan Sun
A 10-bit 120-MS/s SAR ADC With Reference Ripple Cancellation Technique.
IEEE J. Solid State Circuits
55 (3) (2020)
Xiyuan Tang
,
Yi Shen
,
Xin Xin
,
Shubin Liu
,
Jueping Cai
,
Zhangming Zhu
,
Nan Sun
A 10-Bit 100-MS/s SAR ADC with Always-on Reference Ripple Cancellation.
VLSI Circuits
(2020)
Shubin Liu
,
Haolin Han
,
Yi Shen
,
Zhangming Zhu
A 12-Bit 100-MS/s Pipelined-SAR ADC With PVT-Insensitive and Gain-Folding Dynamic Amplifier.
IEEE Trans. Circuits Syst. I Regul. Pap.
(8) (2020)
Xiyuan Tang
,
Yi Shen
,
Linxiao Shen
,
Wenda Zhao
,
Zhangming Zhu
,
Visvesh Sathe
,
Nan Sun
A 10b 120MS/s SAR ADC with Reference Ripple Cancellation Technique.
CICC
(2019)
Linxiao Shen
,
Yi Shen
,
Xiyuan Tang
,
Chen-Kai Hsu
,
Wei Shi
,
Shaolan Li
,
Wenda Zhao
,
Abhishek Mukherjee
,
Nan Sun
25µW 2MS/s 74dB-SNDR Continuous-Time Pipelined-SAR ADC with 120fF Input Capacitor.
ISSCC
(2019)
Linxiao Shen
,
Nan Sun
,
Yi Shen
,
Zhelu Li
,
Wei Shi
,
Xiyuan Tang
,
Shaolan Li
,
Wenda Zhao
,
Mantian Zhang
,
Zhangming Zhu
A Two-Step ADC With a Continuous-Time SAR-Based First Stage.
IEEE J. Solid State Circuits
54 (12) (2019)
Jingyu Wang
,
Shubin Liu
,
Yi Shen
,
Zhangming Zhu
Low-Power Single-Ended SAR ADC Using Symmetrical DAC Switching for Image Sensors With Passive CDS and PGA Technique.
IEEE Trans. Circuits Syst. I Regul. Pap.
(8) (2018)
Yi Shen
,
Zhangming Zhu
,
Shubin Liu
,
Yintang Yang
A Reconfigurable 10-to-12-b 80-to-20-MS/s Bandwidth Scalable SAR ADC.
IEEE Trans. Circuits Syst. I Regul. Pap.
(1) (2018)
Shubin Liu
,
Yi Shen
,
Zhangming Zhu
A 12-Bit 10 MS/s SAR ADC With High Linearity and Energy-Efficient Switching.
IEEE Trans. Circuits Syst. I Regul. Pap.
(10) (2016)
Yi Shen
,
Shubin Liu
,
Zhangming Zhu
A 12-bit 50MS/s zero-crossing-based two-stage pipelined SAR ADC in 0.18 µm CMOS.
Microelectron. J.
57 (2016)
Yi Shen
,
Zhangming Zhu
Analysis and optimization of the two-stage pipelined SAR ADCs.
Microelectron. J.
47 (2016)
Zhangming Zhu
,
Zheng Qiu
,
Yi Shen
,
Yintang Yang
A 2.67 fJ/c.-s. 27.8 kS/s 0.35 V 10-bit successive approximation register analogue-to-digital converter in 65 nm complementary metal oxide semiconductor.
IET Circuits Devices Syst.
8 (6) (2014)