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Dengquan Li
ORCID
Publication Activity (10 Years)
Years Active: 2015-2024
Publications (10 Years): 31
Top Topics
Power Supply
Analog To Digital Converter
Synthetic Aperture Radar
Random Access Memory
Top Venues
Microelectron. J.
IEEE Trans. Circuits Syst. II Express Briefs
IEEE Trans. Very Large Scale Integr. Syst.
J. Circuits Syst. Comput.
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Publications
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Dengquan Li
,
Yexin Zhu
,
Longsheng Wang
,
Shubin Liu
,
Zhangming Zhu
Low-Cost Linearity Testing of High-Resolution ADCs Using Segmentation Modeling and Partial Polynomial Fitting.
ISCAS
(2024)
Dengquan Li
,
Longsheng Wang
,
Yi Shen
,
Shubin Liu
,
Zhangming Zhu
A Background Timing Skew Calibration for Time-Interleaved ADCs Based on Frequency Fitness Genetic Algorithm.
IEEE Trans. Instrum. Meas.
73 (2024)
Dengquan Li
,
Tian Feng
,
Jiale Ding
,
Yi Shen
,
Shubin Liu
,
Zhangming Zhu
A Wideband Input Buffer Based on Cascade Complementary Source Follower.
IEEE Trans. Very Large Scale Integr. Syst.
32 (5) (2024)
Jiale Ding
,
Yukai Huang
,
Hao Zhang
,
Tian Feng
,
Feida Wang
,
Dengquan Li
,
Zhangming Zhu
8-bit 32-GS/s TI-SAR ADC with optimized hierarchical sampling architecture.
Microelectron. J.
144 (2024)
Hongzhi Liang
,
Shubin Liu
,
Ruixue Ding
,
Yi Shen
,
Dengquan Li
,
Zhangming Zhu
A 4-GS/s 6-Bit Single-Channel TDC-Assisted Hybrid ADC Featuring Power Supply Variation Adaptation for Inter-Stage Gain Error.
IEEE Trans. Circuits Syst. II Express Briefs
71 (1) (2024)
Yi Shen
,
Junyan Hao
,
Shubin Liu
,
Zeshuai An
,
Dengquan Li
,
Ruixue Ding
,
Zhangming Zhu
An 8-bit 1.5-GS/s Two-Step SAR ADC With Embedded Interstage Gain.
IEEE Trans. Very Large Scale Integr. Syst.
31 (11) (2023)
Dengquan Li
,
Xin Zhao
,
Yi Shen
,
Shubin Liu
,
Zhangming Zhu
A 7-bit 3.8-GS/s 2-Way Time-Interleaved 4-bit/Cycle SAR ADC 16× Time-Domain Interpolation in 28-nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
70 (9) (2023)
Yi Shen
,
Shubin Liu
,
Yue Cao
,
Haolin Han
,
Hongzhi Liang
,
Zhicheng Dong
,
Dengquan Li
,
Ruixue Ding
,
Zhangming Zhu
A 12b 1.5GS/s Single-Channel Pipelined SAR ADC with a Pipelined Residue Amplification Stage.
CICC
(2023)
Xin Zhao
,
Dengquan Li
,
Feida Wang
,
Yi Shen
,
Shubin Liu
,
Ruixue Ding
,
Zhangming Zhu
An 8-bit 1.5-GS/s Voltage-Time Hybrid Two-Step ADC With Cross-Coupled Linearized VTC.
IEEE Trans. Very Large Scale Integr. Syst.
31 (12) (2023)
Dengquan Li
,
Lei Zhao
,
Longsheng Wang
,
Yi Shen
,
Zhangming Zhu
A Fast Convergence Second-Order Compensation for Timing Skew in Time-Interleaved ADCs.
IEEE Trans. Very Large Scale Integr. Syst.
30 (10) (2022)
Yukai Huang
,
Jiale Ding
,
Dengquan Li
,
Xin Zhao
,
Shubin Liu
,
Yi Shen
,
Zhangming Zhu
A loop-unrolled assisted 9b 700 MS/s nonbinary 2b/cycle SAR ADC with time-based offset calibration.
Microelectron. J.
122 (2022)
Tian Feng
,
Dengquan Li
,
Jiale Ding
,
Shubin Liu
,
Yi Shen
,
Zhangming Zhu
A Wideband High-linearity Input Buffer Based on Cascade Complementary Source Follower.
ICTA
(2022)
Dengquan Li
,
Xin Zhao
,
Shubin Liu
,
Maliang Liu
,
Ruixue Ding
,
Yuhua Liang
,
Zhangming Zhu
Radio frequency analog-to-digital converters: Systems and circuits review.
Microelectron. J.
119 (2022)
Jiale Ding
,
Yukai Huang
,
Dengquan Li
,
Shubin Liu
,
Yi Shen
,
Zhangming Zhu
Analysis and Design of a High-Bandwidth Front-End Sampler for Time-Interleaved ADCs.
Circuits Syst. Signal Process.
41 (12) (2022)
Maliang Liu
,
Chenxi Zhang
,
Shubin Liu
,
Dengquan Li
A 10-Bit 2.5-GS/s Two-Step ADC With Selective Time-Domain Quantization in 28-nm CMOS.
IEEE Trans. Circuits Syst. I Regul. Pap.
69 (3) (2022)
Depeng Sun
,
Ruixue Ding
,
Feng Bu
,
Hongzhi Liang
,
Dengquan Li
,
Yuhua Liang
,
Shubin Liu
A Power-Efficient TVC-Based Fast Auto-Frequency Calibration for PLLs.
IEEE Trans. Circuits Syst. II Express Briefs
69 (6) (2022)
Henghui Mao
,
Dengquan Li
,
Shubin Liu
A configurable nonbinary 7/8-bit 800-400 MS/s SAR ADC in 65 nm CMOS.
Microelectron. J.
122 (2022)
Dengquan Li
,
Maliang Liu
,
Shubin Liu
,
Yuhua Liang
,
Ruixue Ding
A statistical offset calibration technique for 1.5-bit/cycle SAR ADCs.
Microelectron. J.
114 (2021)
Jiaxin Liu
,
Dengquan Li
,
Yi Zhong
,
Xiyuan Tang
,
Nan Sun
-Order Noise-Shaping SAR Using Capacitor Stacking and Dynamic Buffering.
ISSCC
(2021)
Lei Zhao
,
Dengquan Li
,
Henghui Mao
,
Ruixue Ding
,
Zhangming Zhu
A 32-GS/s Front-End Sampling Circuit Achieving >39 dB SNDR for Time-Interleaved ADCs in 65-nm CMOS.
J. Circuits Syst. Comput.
30 (8) (2021)
Zhangming Zhu
,
Yu Zhu
,
Dengquan Li
,
Maliang Liu
A TD-ADC for IR-UWB Radars With Equivalent Sampling Technology and 8-GS/s Effective Sampling Rate.
IEEE Trans. Circuits Syst. II Express Briefs
68 (3) (2021)
Maliang Liu
,
Dengquan Li
,
Zhangming Zhu
A Dual-Supply Two-Stage CMOS Op-amp for High-Speed Pipeline ADCs Application.
IEEE Trans. Circuits Syst. II Express Briefs
(4) (2020)
Dengquan Li
,
Zhangming Zhu
,
Jiaxin Liu
,
Haoyu Zhuang
,
Yintang Yang
,
Nan Sun
A 7-bit 900-MS/s 2-Then-3-bit/cycle SAR ADC With Background Offset Calibration.
IEEE J. Solid State Circuits
55 (11) (2020)
Dengquan Li
,
Maliang Liu
,
Lei Zhao
,
Henghui Mao
,
Ruixue Ding
,
Zhangming Zhu
An 8-Bit 2.1-mW 350-MS/s SAR ADC With 1.5 b/cycle Redundancy in 65-nm CMOS.
IEEE Trans. Circuits Syst.
(11) (2020)
Dengquan Li
,
Zhangming Zhu
,
Ruixue Ding
,
Maliang Liu
,
Yintang Yang
,
Nan Sun
A 10-Bit 600-MS/s Time-Interleaved SAR ADC With Interpolation-Based Timing Skew Calibration.
IEEE Trans. Circuits Syst. II Express Briefs
(1) (2019)
Dengquan Li
,
Jiaxin Liu
,
Haoyu Zhuang
,
Zhangming Zhu
,
Yintang Yang
,
Nan Sun
A 7b 2.6mW 900MS/s Nonbinary 2-then-3b/cycle SAR ADC with Background Offset Calibration.
CICC
(2019)
Dengquan Li
,
Ruixue Ding
,
Zhangming Zhu
,
Yintang Yang
A Background Timing Skew Calibration Technique in Time-Interleaved ADCs With Second Order Compensation.
APCCAS
(2018)
Dengquan Li
,
Zhangming Zhu
,
Ruixue Ding
,
Yintang Yang
A 1.4-mW 10-Bit 150-MS/s SAR ADC With Nonbinary Split Capacitive DAC in 65-nm CMOS.
IEEE Trans. Circuits Syst. II Express Briefs
(11) (2018)
Rui Ma
,
Lisha Wang
,
Dengquan Li
,
Ruixue Ding
,
Zhangming Zhu
A 10-bit 100-MS/s 5.23-mW SAR ADC in 0.18-μm CMOS.
Microelectron. J.
78 (2018)
Liang Zhang
,
Dengquan Li
,
Zhangming Zhu
,
Yintang Yang
A 10-GS/s 6-Bit Track-and-Hold Amplifier for Time-Interleaved SAR ADCs in 65-nm CMOS.
J. Circuits Syst. Comput.
25 (8) (2016)
Dengquan Li
,
Zhangming Zhu
,
Liang Zhang
,
Yintang Yang
A background fast convergence algorithm for timing skew in time-interleaved ADCs.
Microelectron. J.
47 (2016)
Dengquan Li
,
Liang Zhang
,
Zhangming Zhu
,
Yintang Yang
An 8-Bit 0.333-2 GS/s Configurable Time-Interleaved SAR ADC in 65-nm CMOS.
J. Circuits Syst. Comput.
24 (6) (2015)