An 8-Bit 2.1-mW 350-MS/s SAR ADC With 1.5 b/cycle Redundancy in 65-nm CMOS.
Dengquan LiMaliang LiuLei ZhaoHenghui MaoRuixue DingZhangming ZhuPublished in: IEEE Trans. Circuits Syst. (2020)
Keyphrases
- analog to digital converter
- power consumption
- nm technology
- low power
- cmos technology
- power supply
- synthetic aperture radar
- mixed signal
- hd video
- image sensor
- sar images
- random access memory
- parameter estimation
- power reduction
- power management
- image reconstruction
- high definition
- single chip
- cmos image sensor
- image processing
- low voltage
- video camera
- pac man