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8-bit 32-GS/s TI-SAR ADC with optimized hierarchical sampling architecture.
Jiale Ding
Yukai Huang
Hao Zhang
Tian Feng
Feida Wang
Dengquan Li
Zhangming Zhu
Published in:
Microelectron. J. (2024)
Keyphrases
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analog to digital converter
synthetic aperture radar
hierarchical architecture
sigma delta
sar images
texas instruments
real time
hierarchical structure
image reconstruction
multi layer
design considerations
sar imagery
high speed
collaborative learning
coarse to fine