Nan Sun

Publication Activity (10 Years)

Years Active: 2023-2024
Publications (10 Years): 13

Top Topics

Camera Calibration

Top Venues

IEEE J. Solid State Circuits

IEEE Trans. Circuits Syst. II Express Briefs

Publications

Chengyu Huang, Kezhuo Ma, Sihao Chen, Jiaxuan Fan, Nan Sun, Huazhong Yang, Xueqing Li
A 16-bit 10-GS/s Calibration-Free DAC Achieving <-77dBc IM3 up to 4.95GHz in 28nm CMOS. CICC (2024)
Mingtao Zhan, Lu Jie, Xiyuan Tang, Yi Zhong, Nan Sun
200-MS/s Pipelined SAR ADC With kT/C Noise Cancellation and Robust Ring-Amp. IEEE J. Solid State Circuits 59 (7) (2024)
Yunsong Tao, Mingyang Gu, Baoyong Chi, Yi Zhong, Lu Jie, Nan Sun
22.4 A 4.8GS/s 7-ENoB Time-Interleaved SAR ADC with Dither-Based Background Timing-Skew Calibration and Bit-Distribution-Based Background Ping-Pong Comparator Offset Calibration. ISSCC (2024)
Jinshan Yue, Yongpan Liu, Xiaoyu Feng, Yifan He, Jingyu Wang, Zhe Yuan, Mingtao Zhan, Jiaxin Liu, Jian-Wei Su, Yen-Lin Chung, Ping-Chun Wu, Li-Yang Hong, Meng-Fan Chang, Nan Sun, Chunmeng Dou, Xueqing Li, Ming Liu, Huazhong Yang
An Energy-Efficient Computing-in-Memory NN Processor With Set-Associate Blockwise Sparsity and Ping-Pong Weight Update. IEEE J. Solid State Circuits 59 (5) (2024)
Yunsong Tao, Yi Zhong, Jin Shao, Changyou Men, Lu Jie, Nan Sun
A Dithered-Digital-Mixing Background Timing-Skew Calibration Method for Time-Interleaved ADCs. ISCAS (2024)
Xiyu He, Mingyang Gu, Hanjun Jiang, Yi Zhong, Nan Sun, Lu Jie
9.3 A 71dB SNDR 200MHz BW Interleaved Pipe-SAR ADC with a Shared Residue Integrating Amplifier Achieving 173dB FoMs. ISSCC (2024)
Chang Liu, Jiaxin Liu, Nan Sun
Mitigating Sampling Noise for Energy-Efficient ADCs: A Tutorial Brief. IEEE Trans. Circuits Syst. II Express Briefs 71 (3) (2024)
Chaoyang Xing, Yi Zhong, Nan Sun, Lu Jie
-order RT-DEM and Quiet Chopping. ESSCIRC (2023)
Xiangxing Yang, Nan Sun
A 4-Bit Mixed-Signal MAC Macro With One-Shot ADC Conversion. IEEE J. Solid State Circuits 58 (9) (2023)
Mingyang Gu, Yi Zhong, Lu Jie, Nan Sun
A 12b 1GS/s Pipelined ADC with Digital Background Calibration of Inter-stage Gain, Capacitor Mismatch, and Kick-back Errors. ESSCIRC (2023)
Xiyuan Tang, Xiangxing Yang, Jiaxin Liu, Zongnan Wang, Wei Shi, David Z. Pan, Nan Sun
A Bandwidth-Adaptive Pipelined SAR ADC With Three-Stage Cascoded Floating Inverter Amplifier. IEEE J. Solid State Circuits 58 (9) (2023)
Mingtao Zhan, Lu Jie, Yi Zhong, Nan Sun
A 10-mW 10-ENoB 1-GS/s Ring-Amp-Based Pipelined TI-SAR ADC With Split MDAC and Switched Reference Decoupling Capacitor. IEEE J. Solid State Circuits 58 (12) (2023)
Mingyang Gu, Yunsong Tao, Xiyu He, Yi Zhong, Lu Jie, Nan Sun
A 3.7mW 11b 1GS/s Time-Interleaved SAR ADC with Robust One-Stage Correlation-Based Background Timing-Skew Calibration. ESSCIRC (2023)