Zhixian Deng

Publication Activity (10 Years)

Years Active: 2019-2024
Publications (10 Years): 13

Top Topics

Projector Camera

Phase Information

Noise Reduction

Top Venues

IEEE J. Solid State Circuits

IEEE Trans. Circuits Syst. I Regul. Pap.

Publications

Changxuan Han, Zhixian Deng, Yiyang Shu, Jun Yin, Pui-In Mak, Xun Luo
A 5.6-dB Noise Figure, 63-86-GHz Receiver Using a Wideband Noise-Cancelling Low Noise Amplifier With Phase and Amplitude Compensation. IEEE Trans. Circuits Syst. I Regul. Pap. 71 (1) (2024)
Xun Luo, Bingzheng Yang, Zhixian Deng, Wen Chen, Yiyang Shu, Jie Zhou
A Phased-Array Transceiver With 2-Dimension Continuously Auto Link-Tracking Operation and Time Division Modulator. IEEE J. Solid State Circuits 59 (8) (2024)
Zhixian Deng, Bingzheng Yang, Wen Chen, Jie Zhou, Changxuan Han, Yifan Li, Yiyang Shu, Xun Luo
An 8-Element 23-40 GHz Continuously Auto Link-Tracking Phased-Array Transceiver with Time Division Modulator Achieving 7μs Tracking Time, 25.3% TX System Efficiency, 800MHz-64QAM Modulation for 5G NR. CICC (2023)
Changxuan Han, Jie Zhou, Zhixian Deng, Yiyang Shu, Xun Luo
A 4.8dB NF, 70-to-86GHz Deep-Noise-Canceling LNA Using Asymmetric Compensation Transformer and 4-to-1 Hybrid-Phase Combiner in 40nm CMOS. ISSCC (2023)
Bingzheng Yang, Zhixian Deng, Huizhen Jenny Qian, Xun Luo
71-to-89GHz 12Gb/s Double-Edge-Triggered Quadrature RFDAC with LO Leakage Suppression Achieving 20.5dBm Peak Output Power and 20.4% System Efficiency. ISSCC (2023)
Zhixian Deng, Changxuan Han, Yifan Li, Huizhen Jenny Qian, Xun Luo
A 23-40-GHz Phased-Array Receiver Using 14-Bit Phase-Gain Manager and Wideband Noise-Canceling LNA. IEEE J. Solid State Circuits 58 (3) (2023)
Yiyang Shu, Zhixian Deng, Xun Luo
A 28GHz Scalable Inter-Core-Shaping Multi-Core Oscillator with DM/CM-Configured Coupling Achieving 193.3dBc/Hz FoM and 205.5dBc/Hz FoMA at 1MHz Offset. ISSCC (2023)
Zhixian Deng, Huizhen Jenny Qian, Xun Luo
A Reflectionless Receiver With Absorptive IF Amplifier and Dual-Path Noise-Canceling LNA. IEEE J. Solid State Circuits 57 (8) (2022)
Qingxian Li, Hongxin Tang, Deshan Tang, Zhixian Deng, Xun Luo
Compact SIDGS Filtering Power Divider With Three-Port 10-GHz Reflectionless Range. IEEE Trans. Circuits Syst. II Express Briefs 69 (7) (2022)
Zhixian Deng, Huizhen Jenny Qian, Changxuan Han, Yifan Li, Xun Luo
A 3.8-dB NF, 23-40GHz Phased-Array Receiver with 14-Bit Phase & Gain Manager and Calibration-Free Dual-Mode 28-52dB Image Rejection Ratio for 5G NR. CICC (2022)
Zhixian Deng, Jie Zhou, Huizhen Jenny Qian, Xun Luo
A 22.9-38.2-GHz Dual-Path Noise-Canceling LNA With 2.65-4.62-dB NF in 28-nm CMOS. IEEE J. Solid State Circuits 56 (11) (2021)
Zhixian Deng, Huizhen Jenny Qian, Xun Luo
A 3.6dB NF, 23-39GHz Reflectionless RX with Absorptive Amplifier and Dual-Path Noise Cancelling LNA Supporting 64-QAM/256-QAM/1024-QAM for 5G NR. CICC (2021)
Zhixian Deng, Huizhen Jenny Qian, Xun Luo
Tunable Quasi-Circulator Based on a Compact Fully-Reconfigurable 180° Hybrid for Full-Duplex Transceivers. IEEE Trans. Circuits Syst. I Regul. Pap. (8) (2019)