Hoi-Jun Yoo

ORCID

Publication Activity (10 Years)

Years Active: 1993-2024
Publications (10 Years): 232

Top Venues

IEEE J. Solid State Circuits

ISSCC

ISCAS

A-SSCC

Publications

Donghyeon Han, Junha Ryu, Sangyeob Kim, Sangjin Kim, Jongjun Park, Hoi-Jun Yoo
MetaVRain: A Mobile Neural 3-D Rendering Processor With Bundle-Frame-Familiarity-Based NeRF Acceleration and Hybrid DNN Computing. IEEE J. Solid State Circuits 59 (1) (2024)
Donghyeon Han, Junha Ryu, Sangyeob Kim, Sangjin Kim, Jongjun Park, Hoi-Jun Yoo
A Low-Power Artificial-Intelligence-Based 3-D Rendering Processor With Hybrid Deep Neural Network Computing. IEEE Micro 44 (1) (2024)
Sangjin Kim, Zhiyong Li, Soyeon Um, Wooyoung Jo, Sangwoo Ha, Juhyoung Lee, Sangyeob Kim, Donghyeon Han, Hoi-Jun Yoo
DynaPlasia: An eDRAM In-Memory Computing-Based Reconfigurable Spatial Accelerator With Triple-Mode Cell. IEEE J. Solid State Circuits 59 (1) (2024)
Kwantae Kim, Changhyeon Kim, Sungpill Choi, Hoi-Jun Yoo
Sinusoidal Current Generator IC with 0.088% THD for Bio-Impedance Sensing. CoRR (2024)
Sangyeob Kim, Soyeon Kim, Seongyon Hong, Sangjin Kim, Jiwon Choi, Donghyeon Han, Hoi-Jun Yoo
COOL-NPU: Complementary Online Learning Neural Processing Unit. IEEE Micro 44 (1) (2024)
Sangyeob Kim, Soyeon Kim, Seongyon Hong, Sangjin Kim, Donghyeon Han, Jiwon Choi, Hoi-Jun Yoo
C-DNN: An Energy-Efficient Complementary Deep-Neural-Network Processor With Heterogeneous CNN/SNN Core Architecture. IEEE J. Solid State Circuits 59 (1) (2024)
Zhiyong Li, Sangjin Kim, Dongseok Im, Donghyeon Han, Hoi-Jun Yoo
An Efficient Deep-Learning-Based Super-Resolution Accelerating SoC With Heterogeneous Accelerating and Hierarchical Cache. IEEE J. Solid State Circuits 58 (3) (2023)
Wooyoung Jo, Sangjin Kim, Juhyoung Lee, Donghyeon Han, Sangyeob Kim, Seungyoon Choi, Hoi-Jun Yoo
NeRPIM: A 4.2 mJ/frame Neural Rendering Processing-in-memory Processor with Space Encoding Block-wise Mapping for Mobile Devices. VLSI Technology and Circuits (2023)
Sangyeob Kim, Hoi-Jun Yoo
C-DNN V2: Complementary Deep-Neural-Network Processor With Full-Adder/OR-Based Reduction Tree and Reconfigurable Spatial Weight Reuse. IEEE J. Emerg. Sel. Topics Circuits Syst. 13 (4) (2023)
Dongseok Im, Gwangtae Park, Zhiyong Li, Junha Ryu, Hoi-Jun Yoo
Sibia: Signed Bit-slice Architecture for Dense DNN Acceleration with Slice-level Sparsity Exploitation. HPCA (2023)
Jongjun Park, Donghyeon Han, Junha Ryu, Dongseok Im, Gwangtae Park, Hoi-Jun Yoo
A 33.6 FPS Embedding based Real-time Neural Rendering Accelerator with Switchable Computation Skipping Architecture on Edge Device. A-SSCC (2023)
Jiwon Choi, Sangyeob Kim, Wonhoon Park, Wooyoung Jo, Hoi-Jun Yoo
A Resource-Efficient Super-Resolution FPGA Processor with Heterogeneous CNN and SNN Core Architecture. A-SSCC (2023)
Soyeon Um, Sangjin Kim, Seongyon Hong, Sangyeob Kim, Hoi-Jun Yoo
LOG-CIM: A 116.4 TOPS/W Digital Computing-In-Memory Processor Supporting a Wide Range of Logarithmic Quantization with Zero-Aware 6T Dual-WL Cell. A-SSCC (2023)
Soyeon Um, Jaehyuk Lee, Hoi-Jun Yoo
A 3.8 mW 1.9 m Ω/√Hz Electrical Impedance Tomography Imaging with 28.4 M Ω High Input Impedance and Loading Calibration. ESSCIRC (2023)
Seryeong Kim, Soyeon Kim, Soyeon Um, Sangjin Kim, Zhiyong Li, Sangyeob Kim, Wooyoung Jo, Hoi-Jun Yoo
A Reconfigurable 1T1C eDRAM-based Spiking Neural Network Computing-In-Memory Processor for High System-Level Efficiency. ISCAS (2023)
Wenao Xie, Haoyang Sang, Beomseok Kwon, Dongseok Im, Sangjin Kim, Sangyeob Kim, Hoi-Jun Yoo
A 709.3 TOPS/W Event-Driven Smart Vision SoC with High-Linearity and Reconfigurable MRAM PIM. VLSI Technology and Circuits (2023)
Dongseok Im, Gwangtae Park, Junha Ryu, Zhiyong Li, Sanghoon Kang, Donghyeon Han, Jinsu Lee, Wonhoon Park, Hankyul Kwon, Hoi-Jun Yoo
DSPU: An Efficient Deep Learning-Based Dense RGB-D Data Acquisition With Sensor Fusion and 3-D Perception SoC. IEEE J. Solid State Circuits 58 (1) (2023)
Jingu Lee, Sangjin Kim, Wooyoung Jo, Hoi-Jun Yoo
An Energy-Efficient Heterogeneous Fourier Transform-Based Transformer Accelerator with Frequency-Wise Dynamic Bit-Precision. A-SSCC (2023)
Hankyul Kwon, Gwangtae Park, Junha Ryu, Wooyoung Jo, Hoi-Jun Yoo
A 15.9 mW 96.5 fps Memory-Efficient 3D Reconstruction Processor with Dilation-based TSDF Fusion and Block-Projection Cache System. ISCAS (2023)
Sangjin Kim, Zhiyong Li, Soyeon Um, Wooyoung Jo, Sangwoo Ha, Juhyoung Lee, Sangyeob Kim, Donghyeon Han, Hoi-Jun Yoo
DynaPlasia: An eDRAM In-Memory-Computing-Based Reconfigurable Spatial Accelerator with Triple-Mode Cell for Dynamic Resource Switching. ISSCC (2023)
Sangyeob Kim, Soyeon Kim, Seongyon Hong, Sangjin Kim, Donghyeon Han, Jiwon Choi, Hoi-Jun Yoo
COOL-NPU: Complementary Online Learning Neural Processing Unit with CNN-SNN Heterogeneous Core and Event-driven Backpropagation. COOL CHIPS (2023)
Sangyeob Kim, Soyeon Kim, Seongyon Hong, Sangjin Kim, Donghyeon Han, Hoi-Jun Yoo
C-DNN: A 24.5-85.8TOPS/W Complementary-Deep-Neural-Network Processor with Heterogeneous CNN/SNN Core Architecture and Forward-Gradient-Based Sparsity Generation. ISSCC (2023)
Sangjin Kim, Soyeon Um, Wooyoung Jo, Jingu Lee, Sangwoo Ha, Zhiyong Li, Hoi-Jun Yoo
Scaling-CIM: An eDRAM-based In-Memory-Computing Accelerator with Dynamic-Scaling ADC for SQNR-Boosting and Layer-wise Adaptive Bit-Truncation. VLSI Technology and Circuits (2023)
Dongseok Im, Gwangtae Park, Zhiyong Li, Junha Ryu, Sanghoon Kang, Donghyeon Han, Jinsu Lee, Wonhoon Park, Hankyul Kwon, Hoi-Jun Yoo
A Mobile 3-D Object Recognition Processor With Deep-Learning-Based Monocular Depth Estimation. IEEE Micro 43 (3) (2023)
Donghyeon Han, Junha Ryu, Sangyeob Kim, Sangjin Kim, Jongjun Park, Hoi-Jun Yoo
A Low-power Neural 3D Rendering Processor with Bio-inspired Visual Perception Core and Hybrid DNN Acceleration. COOL CHIPS (2023)
Seongyon Hong, Soyeon Um, Sangjin Kim, Sangyeob Kim, Wooyoung Jo, Hoi-Jun Yoo
A 332 TOPS/W Input/Weight-Parallel Computing-in-Memory Processor with Voltage-Capacitance-Ratio Cell and Time-Based ADC. ISCAS (2023)
Wonhoon Park, Junha Ryu, Sangjin Kim, Soyeon Um, Wooyoung Jo, Sangyoeb Kim, Hoi-Jun Yoo
A 5.99 TFLOPS/W Heterogeneous CIM-NPU Architecture for an Energy Efficient Floating-Point DNN Acceleration. ISCAS (2023)
Donghyeon Han, Junha Ryu, Sangyeob Kim, Sangjin Kim, Hoi-Jun Yoo
MetaVRain: A 133mW Real-Time Hyper-Realistic 3D-NeRF Processor with 1D-2D Hybrid-Neural Engines for Metaverse on Mobile Devices. ISSCC (2023)
Sangyeob Kim, Sangjin Kim, Soyeon Um, Soyeon Kim, Juhyoung Lee, Hoi-Jun Yoo
SNPU: An Energy-Efficient Spike Domain Deep-Neural-Network Processor With Two-Step Spike Encoding and Shift-and-Accumulation Unit. IEEE J. Solid State Circuits 58 (10) (2023)
Seokchan Song, Donghyeon Han, Sangjin Kim, Sangyeob Kim, Gwangtae Park, Hoi-Jun Yoo
GPPU: A 330.4-μJ/ task Neural Path Planning Processor with Hybrid GNN Acceleration for Autonomous 3D Navigation. VLSI Technology and Circuits (2023)
Sangyeob Kim, Sangjin Kim, Soyeon Um, Soyeon Kim, Kwantae Kim, Hoi-Jun Yoo
Neuro-CIM: ADC-Less Neuromorphic Computing-in-Memory Processor With Operation Gating/Stopping and Digital-Analog Networks. IEEE J. Solid State Circuits 58 (10) (2023)
Juhyoung Lee, Jihoon Kim, Wooyoung Jo, Sangyeob Kim, Sangjin Kim, Hoi-Jun Yoo
ECIM: Exponent Computing in Memory for an Energy-Efficient Heterogeneous Floating-Point DNN Training Processor. IEEE Micro 42 (1) (2022)
Sangwoo Ha, Sangjin Kim, Donghyeon Han, Soyeon Um, Hoi-Jun Yoo
A 36.2 dB High SNR and PVT/Leakage-Robust eDRAM Computing-In-Memory Macro With Segmented BL and Reference Cell Array. IEEE Trans. Circuits Syst. II Express Briefs 69 (5) (2022)
Zhiyong Li, Sangjin Kim, Dongseok Im, Donghyeon Han, Hoi-Jun Yoo
An 0.92 mJ/frame High-quality FHD Super-resolution Mobile Accelerator SoC with Hybrid-precision and Energy-efficient Cache. CICC (2022)
Surin Gweon, Sanghoon Kang, Kwantae Kim, Hoi-Jun Yoo
FlashMAC: A Time-Frequency Hybrid MAC Architecture With Variable Latency-Aware Scheduling for TinyML Systems. IEEE J. Solid State Circuits 57 (10) (2022)
Juhyoung Lee, Wooyoung Jo, Seong-Wook Park, Hoi-Jun Yoo
Low-power Autonomous Adaptation System with Deep Reinforcement Learning. AICAS (2022)
Sangyeob Kim, Sangjin Kim, Soyeon Um, Soyeon Kim, Hoi-Jun Yoo
Two-Step Spike Encoding Scheme and Architecture for Highly Sparse Spiking-Neural-Network. CoRR (2022)
Sangjin Kim, Sangyeob Kim, Juhyoung Lee, Hoi-Jun Yoo
A Low-Power Graph Convolutional Network Processor With Sparse Grouping for 3D Point Cloud Semantic Segmentation in Mobile Devices. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (4) (2022)
Kwantae Kim, Chang Gao, Rui Graça, Ilya Kiselev, Hoi-Jun Yoo, Tobi Delbrück, Shih-Chii Liu
A 23 μW Keyword Spotting IC with Ring-Oscillator-Based Time-Domain Feature Extraction. CoRR (2022)
Dongseok Im, Gwangtae Park, Zhiyong Li, Junha Ryu, Hoi-Jun Yoo
Energy-efficient Dense DNN Acceleration with Signed Bit-slice Architecture. CoRR (2022)
Kwantae Kim, Chang Gao, Rui Graça, Ilya Kiselev, Hoi-Jun Yoo, Tobi Delbrück, Shih-Chii Liu
A 23μW Solar-Powered Keyword-Spotting ASIC with Ring-Oscillator-Based Time-Domain Feature Extraction. ISSCC (2022)
Dongseok Im, Gwangtae Park, Junha Ryu, Zhiyong Li, Sanghoon Kang, Donghyeon Han, Jinsu Lee, Wonhoon Park, Hankyul Kwon, Hoi-Jun Yoo
A Low-power and Real-time 3D Object Recognition Processor with Dense RGB-D Data Acquisition in Mobile Platforms. COOL CHIPS (2022)
Sangyeob Kim, Sangjin Kim, Soyeon Um, Soyeon Kim, Kwantae Kim, Hoi-Jun Yoo
Neuro-CIM: A 310.4 TOPS/W Neuromorphic Computing-in-Memory Processor with Low WL/BL activity and Digital-Analog Mixed-mode Neuron Firing. HCS (2022)
Seokchan Song, Soyeon Kim, Gwangtae Park, Donghyeon Han, Hoi-Jun Yoo
A 49.5 mW Multi-Scale Linear Quantized Online Learning Processor for Real-Time Adaptive Object Detection. IEEE Trans. Circuits Syst. II Express Briefs 69 (5) (2022)
Donghyeon Han, Dongseok Im, Gwangtae Park, Youngwoo Kim, Seokchan Song, Juhyoung Lee, Hoi-Jun Yoo
A 0.95 mJ/frame DNN Training Processor for Robust Object Detection with Real-World Environmental Adaptation. AICAS (2022)
Wooyoung Jo, Sangjin Kim, Juhyeong Lee, Soyeon Um, Zhiyong Li, Hoi-Jun Yoo
A 161.6 TOPS/W Mixed-mode Computing-in-Memory Processor for Energy-Efficient Mixed-Precision Deep Neural Networks. ISCAS (2022)
Kwantae Kim, Sangyeob Kim, Hoi-Jun Yoo
Design of Sub-10-μW Sub-0.1% THD Sinusoidal Current Generator IC for Bio-Impedance Sensing. IEEE J. Solid State Circuits 57 (2) (2022)
Donghyeon Han, Dongseok Im, Gwangtae Park, Youngwoo Kim, Seokchan Song, Juhyoung Lee, Hoi-Jun Yoo
HNPU-V2: A 46.6 FPS DNN Training Processor for Real-World Environmental Adaptation based Robust Object Detection on Mobile Devices. HCS (2022)
Donghyeon Han, Dongseok Im, Gwangtae Park, Youngwoo Kim, Seokchan Song, Juhyoung Lee, Hoi-Jun Yoo
A DNN Training Processor for Robust Object Detection with Real-World Environmental Adaptation. AICAS (2022)
Donghyeon Han, Dongseok Im, Gwangtae Park, Youngwoo Kim, Seokchan Song, Juhyoung Lee, Hoi-Jun Yoo
A Mobile DNN Training Processor With Automatic Bit Precision Search and Fine-Grained Sparsity Exploitation. IEEE Micro 42 (2) (2022)
Juhyoung Lee, Sangyeob Kim, Sangjin Kim, Wooyoung Jo, Ji-Hoon Kim, Donghyeon Han, Hoi-Jun Yoo
OmniDRL: An Energy-Efficient Deep Reinforcement Learning Processor With Dual-Mode Weight Compression and Sparse Weight Transposer. IEEE J. Solid State Circuits 57 (4) (2022)
Sangyeob Kim, Juhyoung Lee, Sanghoon Kang, Donghyeon Han, Wooyoung Jo, Hoi-Jun Yoo
TSUNAMI: Triple Sparsity-Aware Ultra Energy-Efficient Neural Network Training Accelerator With Multi-Modal Iterative Pruning. IEEE Trans. Circuits Syst. I Regul. Pap. 69 (4) (2022)
Kwantae Kim, Chang Gao, Rui Graça, Ilya Kiselev, Hoi-Jun Yoo, Tobi Delbruck, Shih-Chii Liu
A 23-μW Keyword Spotting IC With Ring-Oscillator-Based Time-Domain Feature Extraction. IEEE J. Solid State Circuits 57 (11) (2022)
Dongseok Im, Donghyeon Han, Sanghoon Kang, Hoi-Jun Yoo
A Pipelined Point Cloud Based Neural Network Processor for 3-D Vision With Large-Scale Max Pooling Layer Prediction. IEEE J. Solid State Circuits 57 (2) (2022)
Dongseok Im, Gwangtae Park, Zhiyong Li, Junha Ryu, Sanghoon Kang, Donghyeon Han, Jinsu Lee, Wonhoon Park, Hankyul Kwon, Hoi-Jun Yoo
DSPU: A 281.6mW Real-Time Deep Learning-Based Dense RGB-D Data Acquisition with Sensor Fusion and 3D Perception System-on-Chip. HCS (2022)
Dongseok Im, Gwangtae Park, Zhiyong Li, Junha Ryu, Sanghoon Kang, Donghyeon Han, Jinsu Lee, Hoi-Jun Yoo
DSPU: A 281.6mW Real-Time Depth Signal Processing Unit for Deep Learning-Based Dense RGB-D Data Acquisition with Depth Fusion and 3D Bounding Box Extraction in Mobile Platforms. ISSCC (2022)
Zhiyong Li, Sangjin Kim, Dongseok Im, Donghyeon Han, Hoi-Jun Yoo
An Efficient High-quality FHD Super-resolution Mobile Accelerator SoC with Hybrid-precision and Energy-efficient Cache. HCS (2022)
Sangyeob Kim, Sangjin Kim, Soyeon Um, Soyeon Kim, Kwantae Kim, Hoi-Jun Yoo
Neuro-CIM: A 310.4 TOPS/W Neuromorphic Computing-in-Memory Processor with Low WL/BL activity and Digital-Analog Mixed-mode Neuron Firing. VLSI Technology and Circuits (2022)
Juhyoung Lee, Sangyeob Kim, Ji-Hoon Kim, Sangjin Kim, Wooyoung Jo, Donghyeon Han, Hoi-Jun Yoo
OmniDRL: An Energy-Efficient Mobile Deep Reinforcement Learning Accelerators with Dual-mode Weight Compression and Direct Processing of Compressed Data. HCS (2021)
Junha Ryu, Gwangtae Park, Dongseok Im, Ji-Hoon Kim, Hoi-Jun Yoo
A 0.82 μW CIS-Based Action Recognition SoC With Self-Adjustable Frame Resolution for Always-on IoT Devices. IEEE Trans. Circuits Syst. II Express Briefs 68 (5) (2021)
Juhyoung Lee, Changhyeon Kim, Donghyeon Han, Sangyeob Kim, Sangjin Kim, Hoi-Jun Yoo
Energy-Efficient Deep Reinforcement Learning Accelerator Designs for Mobile Autonomous Systems. AICAS (2021)
Kwonjoon Lee, Hoi-Jun Yoo
Simultaneous Electrical Bio-Impedance Plethysmography at Different Body Parts: Continuous and Non-Invasive Monitoring of Pulse Wave Velocity. IEEE Trans. Biomed. Circuits Syst. 15 (5) (2021)
Juhyoung Lee, Sangyeob Kim, Sangjin Kim, Wooyoung Jo, Hoi-Jun Yoo
GST: Group-Sparse Training for Accelerating Deep Reinforcement Learning. CoRR (2021)
Donghyeon Han, Dongseok Im, Gwangtae Park, Youngwoo Kim, Seokchan Song, Juhyoung Lee, Hoi-Jun Yoo
HNPU: An Adaptive DNN Training Processor Utilizing Stochastic Dynamic Fixed-Point and Active Bit-Precision Searching. IEEE J. Solid State Circuits 56 (9) (2021)
Sangjin Kim, Juhyoung Lee, Dongseok Im, Hoi-Jun Yoo
PNNPU: A 11.9 TOPS/W High-speed 3D Point Cloud-based Neural Network Processor with Block-based Point Processing for Regular DRAM Access. VLSI Circuits (2021)
Juhyoung Lee, Jihoon Kim, Wooyoung Jo, Sangyeob Kim, Sangjin Kim, Jinsu Lee, Hoi-Jun Yoo
A 13.7 TFLOPS/W Floating-point DNN Processor using Heterogeneous Computing Architecture with Exponent-Computing-in-Memory. VLSI Circuits (2021)
Sangjin Kim, Juhyoung Lee, Dongseok Im, Hoi-Jun Yoo
PNNPU: A Fast and Efficient 3D Point Cloud-based Neural Network Processor with Block-based Point Processing for Regular DRAM Access. HCS (2021)
Surin Gweon, Sanghoon Kang, Donghyeon Han, Kyoung-Rog Lee, Kwantae Kim, Hoi-Jun Yoo
FlashMAC: An Energy-Efficient Analog-Digital Hybrid MAC with Variable Latency-Aware Scheduling. A-SSCC (2021)
Juhyoung Lee, Sangyeob Kim, Sangjin Kim, Wooyoung Jo, Donghyeon Han, Jinsu Lee, Hoi-Jun Yoo
OmniDRL: A 29.3 TFLOPS/W Deep Reinforcement Learning Processor with Dualmode Weight Compression and On-chip Sparse Weight Transposer. VLSI Circuits (2021)
Soyeon Um, Sangyeob Kim, Sangjin Kim, Hoi-Jun Yoo
A 43.1TOPS/W Energy-Efficient Absolute-Difference-Accumulation Operation Computing-In-Memory With Computation Reuse. IEEE Trans. Circuits Syst. II Express Briefs 68 (5) (2021)
Zhiyong Li, Dongseok Im, Jinsu Lee, Hoi-Jun Yoo
A 3.6 TOPS/W Hybrid FP-FXP Deep Learning Processor with Outlier Compensation for Image-to-Image Application. ISCAS (2021)
Juhyoung Lee, Jihoon Kim, Wooyoung Jo, Sangyeob Kim, Sangjin Kim, Donghyeon Han, Jinsu Lee, Hoi-Jun Yoo
An Energy-efficient Floating-Point DNN Processor using Heterogeneous Computing Architecture with Exponent-Computing-in-Memory. HCS (2021)
Sanghoon Kang, Gwangtae Park, Sangjin Kim, Soyeon Kim, Donghyeon Han, Hoi-Jun Yoo
An Overview of Sparsity Exploitation in CNNs for On-Device Intelligence With Software-Hardware Cross-Layer Optimizations. IEEE J. Emerg. Sel. Topics Circuits Syst. 11 (4) (2021)
Donghyeon Han, Dongseok Im, Gwangtae Park, Youngwoo Kim, Seokchan Song, Juhyoung Lee, Hoi-Jun Yoo
An Energy-Efficient Deep Neural Network Training Processor with Bit-Slice-Level Reconfigurability and Sparsity Exploitation. COOL CHIPS (2021)
Soyeon Kim, Sangjin Kim, Sangyeob Kim, Donghyeon Han, Hoi-Jun Yoo
A 64.1mW Accurate Real-Time Visual Object Tracking Processor With Spatial Early Stopping on Siamese Network. IEEE Trans. Circuits Syst. II Express Briefs 68 (5) (2021)
Soyeon Kim, Sanghoon Kang, Donghyeon Han, Sangjin Kim, Sangyeob Kim, Hoi-Jun Yoo
An Energy-Efficient GAN Accelerator With On-Chip Training for Domain-Specific Optimization. IEEE J. Solid State Circuits 56 (10) (2021)
Jihee Lee, Kyoung-Rog Lee, Benjamin E. Eovino, Jeong Hoan Park, Luna Yue Liang, Liwei Lin, Hoi-Jun Yoo, Jerald Yoo
A 36-Channel Auto-Calibrated Front-End ASIC for a pMUT-Based Miniaturized 3-D Ultrasound System. IEEE J. Solid State Circuits 56 (6) (2021)
Donghyeon Han, Jinsu Lee, Hoi-Jun Yoo
DF-LNPU: A Pipelined Direct Feedback Alignment-Based Deep Neural Network Learning Processor for Fast Online Learning. IEEE J. Solid State Circuits 56 (5) (2021)
Sanghoon Kang, Donghyeon Han, Juhyoung Lee, Dongseok Im, Sangyeob Kim, Soyeon Kim, Junha Ryu, Hoi-Jun Yoo
GANPU: An Energy-Efficient Multi-DNN Training Processor for GANs With Speculative Dual-Sparsity Exploitation. IEEE J. Solid State Circuits 56 (9) (2021)
Jaehyuk Lee, Surin Gweon, Kwonjoon Lee, Soyeon Um, Kyoung-Rog Lee, Hoi-Jun Yoo
A 9.6-mW/Ch 10-MHz Wide-Bandwidth Electrical Impedance Tomography IC With Accurate Phase Compensation for Early Breast Cancer Detection. IEEE J. Solid State Circuits 56 (3) (2021)
Wooyoung Jo, Juhyoung Lee, Seunghyun Park, Hoi-Jun Yoo
An Energy-Efficient Deep Reinforcement Learning FPGA Accelerator for Online Fast Adaptation with Selective Mixed-precision Re-training. A-SSCC (2021)
Kwantae Kim, Ji-Hoon Kim, Surin Gweon, Minseo Kim, Hoi-Jun Yoo
A 0.5-V Sub-10-μW 15.28-mΩ/√Hz Bio-Impedance Sensor IC With Sub-1° Phase Error. IEEE J. Solid State Circuits 55 (8) (2020)
Dongjoo Shin, Hoi-Jun Yoo
The Heterogeneous Deep Neural Network Processor With a Non-von Neumann Architecture. Proc. IEEE 108 (8) (2020)
Soyeon Kim, Sanghoon Kang, Donghyeon Han, Sangyeob Kim, Sangjin Kim, Hoi-Jun Yoo
An Energy-Efficient GAN Accelerator with On-chip Training for Domain Specific Optimization. A-SSCC (2020)
Donghyeon Han, Gwangtae Park, Junha Ryu, Hoi-Jun Yoo
Extension of Direct Feedback Alignment to Convolutional and Recurrent Neural Network for Bio-plausible Deep Learning. CoRR (2020)
Jinsu Lee, Sanghoon Kang, Jinmook Lee, Dongjoo Shin, Donghyeon Han, Hoi-Jun Yoo
The Hardware and Algorithm Co-Design for Energy-Efficient DNN Processor on Edge/Mobile Devices. IEEE Trans. Circuits Syst. (10) (2020)
Hoi-Jun Yoo
Deep Learning Processors for On-Device Intelligence. ACM Great Lakes Symposium on VLSI (2020)
Gwangtae Park, Dongseok Im, Donghyeon Han, Hoi-Jun Yoo
A 1.15 TOPS/W Energy-Efficient Capsule Network Accelerator for Real-Time 3D Point Cloud Segmentation in Mobile Environment. IEEE Trans. Circuits Syst. II Express Briefs (9) (2020)
Sangyeob Kim, Juhyoung Lee, Sanghoon Kang, Jinsu Lee, Hoi-Jun Yoo
A Power-Efficient CNN Accelerator With Similar Feature Skipping for Face Recognition in Mobile Devices. IEEE Trans. Circuits Syst. I Fundam. Theory Appl. (4) (2020)
Jaeeun Jang, Jihee Lee, Hyunwoo Cho, Jaehyuk Lee, Hoi-Jun Yoo
Wireless Body-Area-Network Transceiver and Low-Power Receiver With High Application Expandability. IEEE J. Solid State Circuits 55 (10) (2020)
Kwantae Kim, Changhyeon Kim, Sungpill Choi, Hoi-Jun Yoo
Sinusoidal Current Generator IC with 0.088% THD for Bio-Impedance Sensing. VLSI Circuits (2020)
Sangyeob Kim, Juhyoung Lee, Sanghoon Kang, Jinmook Lee, Hoi-Jun Yoo
A 146.52 TOPS/W Deep-Neural-Network Learning Processor with Stochastic Coarse-Fine Pruning and Adaptive Input/Output/Weight Skipping. VLSI Circuits (2020)
Jaehyuk Lee, Surin Gweon, Kwonjoon Lee, Soyeon Um, Kyoung-Rog Lee, Kwantae Kim, Jihee Lee, Hoi-Jun Yoo
A 9.6 mW/Ch 10 MHz Wide-bandwidth Electrical Impedance Tomography IC with Accurate Phase Compensation for Breast Cancer Detection. CICC (2020)
Dongseok Im, Donghyeon Han, Sungpill Choi, Sanghoon Kang, Hoi-Jun Yoo
DT-CNN: An Energy-Efficient Dilated and Transposed Convolutional Neural Network Processor for Region of Interest Based Image Segmentation. IEEE Trans. Circuits Syst. (10) (2020)
Sanghoon Kang, Donghyeon Han, Juhyoung Lee, Dongseok Im, Sangyeob Kim, Soyeon Kim, Hoi-Jun Yoo
7.4 GANPU: A 135TFLOPS/W Multi-DNN Training Processor for GANs with Speculative Dual-Sparsity Exploitation. ISSCC (2020)
Youngwoo Kim, Donghyeon Han, Changhyeon Kim, Hoi-Jun Yoo
A 0.22-0.89 mW Low-Power and Highly-Secure Always-On Face Recognition Processor With Adversarial Attack Prevention. IEEE Trans. Circuits Syst. II Express Briefs (5) (2020)
Ji-Hoon Kim, Juhyoung Lee, Jinsu Lee, Hoi-Jun Yoo, Joo-Young Kim
Z-PIM: An Energy-Efficient Sparsity Aware Processing-In-Memory Architecture with Fully-Variable Weight Precision. VLSI Circuits (2020)
Dongseok Im, Sanghoon Kang, Donghyeon Han, Sungpill Choi, Hoi-Jun Yoo
A 4.45 ms Low-Latency 3D Point-Cloud-Based Neural Network Processor for Hand Pose Estimation in Immersive Wearable Devices. VLSI Circuits (2020)
Juhyoung Lee, Jinsu Lee, Hoi-Jun Yoo
SRNPU: An Energy-Efficient CNN-Based Super-Resolution Processor With Tile-Based Selective Super-Resolution in Mobile Devices. IEEE J. Emerg. Sel. Topics Circuits Syst. 10 (3) (2020)
Sangjin Kim, Sangyeob Kim, Juhyoung Lee, Hoi-Jun Yoo
A 54.7 fps 3D Point Cloud Semantic Segmentation Processor with Sparse Grouping Based Dilated Graph Convolutional Network for Mobile Devices. ISCAS (2020)

Hoi-Jun Yoo.css-eqlu8i{font-size:small;padding-left:4px;}

Publication Activity (10 Years)

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Hoi-Jun Yoo