A 15.9 mW 96.5 fps Memory-Efficient 3D Reconstruction Processor with Dilation-based TSDF Fusion and Block-Projection Cache System.
Hankyul KwonGwangtae ParkJunha RyuWooyoung JoHoi-Jun YooPublished in: ISCAS (2023)
Keyphrases
- memory efficient
- multithreading
- instruction scheduling
- high speed
- external memory
- embedded processors
- memory access
- cache misses
- processor core
- block size
- power consumption
- memory hierarchy
- memory subsystem
- mathematical morphology
- real time
- low cost
- frame rate
- three dimensional
- shared memory multiprocessors
- single chip
- multiple sequence alignment
- clock frequency
- iterative deepening
- morphological operators
- central catadioptric cameras
- binary images
- data fusion
- data access
- main memory
- d scene
- database workloads
- multiprocessor systems
- integral image
- instruction set
- structure from motion
- structuring elements
- query processing
- computer vision
- image blocks
- high definition
- ibm zenterprise
- prefetching
- data structure
- parallel implementation