Shinobu Nagayama

Publication Activity (10 Years)

Years Active: 2002-2024
Publications (10 Years): 21

Top Topics

Decision Diagrams

Optimization Method

Approximate Nearest Neighbor

Top Venues

IEICE Trans. Inf. Syst.

J. Multiple Valued Log. Soft Comput.

Publications

Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
Functional Decomposition of Symmetric Multiple-Valued Functions and Their Compact Representation in Decision Diagrams. IEICE Trans. Inf. Syst. 107 (8) (2024)
Jon T. Butler, Tsutomu Sasao, Shinobu Nagayama
On the distribution of sensitivities of symmetric Boolean functions. CoRR (2023)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
On Representation of Maximally Asymmetric Functions Based on Decision Diagrams. FLAP 10 (6) (2023)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
Decomposition-Based Representation of Symmetric Multiple-Valued Functions. ISMVL (2023)
Gaku Kataoka, Masahiro Yamamoto, Masato Inagi, Shinobu Nagayama, Shin'ichi Wakabayashi
Feature Vectors Based on Wire Width and Distance for Lithography Hotspot Detection. IPSJ Trans. Syst. LSI Des. Methodol. 16 (2023)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
A Fast Method for Exactly Optimum Linear Decomposition of Index Generation Functions. J. Multiple Valued Log. Soft Comput. 38 (3-4) (2022)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
On Decision Diagrams for Maximally Asymmetric Functions. ISMVL (2022)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
Improvement in the Quality of Solutions of a Heuristic Linear Decomposer for Index Generation Functions. ISMVL (2021)
Jon T. Butler, Tsutomu Sasao, Shinobu Nagayama
Properties of Multiple-Valued Partition Functions. ISMVL (2020)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
On Optimum Linear Decomposition of Symmetric Index Generation Functions. ISMVL (2020)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
A Dynamic Programming Based Method for Optimum Linear Decomposition of Index Generation Functions. ISMVL (2019)
Gaku Kataoka, Masato Inagi, Shinobu Nagayama, Shin'ichi Wakabayashi
Novel Feature Vectors Considering Distances between Wires for Lithography Hotspot Detection. DSD (2018)
Yuri Itotani, Shin'ichi Wakabayashi, Shinobu Nagayama, Masato Inagi
An Approximate Nearest Neighbor Search Algorithm Using Distance-Based Hashing. DEXA (2) (2018)
Toshitaka Ito, Yuri Itotani, Shin'ichi Wakabayashi, Shinobu Nagayama, Masato Inagi
A Nearest Neighbor Search Engine Using Distance-Based Hashing. FPT (2018)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
An Exact Optimization Method using ZDDs for Linear Decomposition of Symmetric Index Generation Functions. FLAP 5 (9) (2018)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
An Exact Optimization Method Using ZDDs for Linear Decomposition of Index Generation Functions. ISMVL (2018)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
An Exact Optimization Algorithm for Linear Decomposition of Index Generation Functions. ISMVL (2017)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
A Balanced Decision Tree Based Heuristic for Linear Decomposition of Index Generation Functions. IEICE Trans. Inf. Syst. (8) (2017)
Yuto Arai, Shin'ichi Wakabayashi, Shinobu Nagayama, Masato Inagi
An efficient FPGA implementation of Mahalanobis distance-based outlier detection for streaming data. FPT (2016)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
An Efficient Heuristic for Linear Decomposition of Index Generation Functions. ISMVL (2016)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, Mitchell A. Thornton, Theodore W. Manikas
Edge Reduction for EVMDDs to Speed Up Analysis of Multi-state Systems. ISMVL (2015)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
Piecewise Arithmetic Expressions of Numeric Functions and Their Application to Design of Numeric Function Generators. J. Multiple Valued Log. Soft Comput. 23 (3-4) (2014)
Ryutaro Kurai, Norihito Yasuda, Hiroki Arimura, Shinobu Nagayama, Shin-ichi Minato
Fast Regular Expression Matching Based On Dual Glushkov NFA. Stringology (2014)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, Mitchell A. Thornton, Theodore W. Manikas
Analysis Methods of Multi-state Systems Partially Having Dependent Components Using Multiple-Valued Decision Diagrams. ISMVL (2014)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, Mitchell A. Thornton, Theodore W. Manikas
On Optimizations of Edge-Valued MDDs for Fast Analysis of Multi-State Systems. IEICE Trans. Inf. Syst. (9) (2014)
Yoichi Wakaba, Shin'ichi Wakabayashi, Shinobu Nagayama, Masato Inagi
An Area Efficient Regular Expression Matching Engine Using Partial Reconfiguration for Quick Pattern Updating. Inf. Media Technol. 9 (4) (2014)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
EVMDD-Based Analysis and Diagnosis Methods of Multi-State Systems with Multi-State Components. J. Multiple Valued Log. Soft Comput. 22 (1-2) (2014)
Leonid Moroz, Shinobu Nagayama, Taras Mykytiv, Ihor O. Kirenko, Taras Boretskyy
Simple Hybrid Scaling-Free CORDIC Solution for FPGAs. Int. J. Reconfigurable Comput. 2014 (2014)
Hiroki Nishiyama, Masato Inagi, Shin'ichi Wakabayashi, Shinobu Nagayama, Keisuke Inoue, Mineo Kaneko
An ILP-Based Optimal Circuit Mapping Method for PLDs. IPDPS Workshops (2014)
Mitchell A. Thornton, Theodore W. Manikas, Stephen A. Szygenda, Shinobu Nagayama
System Probability Distribution Modeling Using MDDs. ISMVL (2014)
Yoichi Wakaba, Shin'ichi Wakabayashi, Shinobu Nagayama, Masato Inagi
An Area Efficient Regular Expression Matching Engine Using Partial Reconfiguration for Quick Pattern Updating. IPSJ Trans. Syst. LSI Des. Methodol. 7 (2014)
Yoichi Wakaba, Shinobu Nagayama, Shin'ichi Wakabayashi, Masato Inagi
A Flexible and Compact Regular Expression Matching Engine Using Partial Reconfiguration for FPGA. DSD (2013)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
Minimization of the Number of Edges in an EVMDD by Variable Grouping for Fast Analysis of Multi-State Systems. ISMVL (2013)
Yasuhiro Shintani, Masato Inagi, Shinobu Nagayama, Shin'ichi Wakabayashi
A Multithreaded Parallel Global Routing Method with Overlapped Routing Regions. DSD (2013)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
Analysis of Multi-state Systems with Multi-state Components Using EVMDDs. ISMVL (2012)
Yoichi Wakaba, Masato Inagi, Shin'ichi Wakabayashi, Shinobu Nagayama
An Efficient Hardware Matching Engine for Regular Expression with Nested Kleene Operators. FPL (2011)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
Numeric Function Generators Using Piecewise Arithmetic Expressions. ISMVL (2011)
Satoru Nakano, Yoichi Wakaba, Shinobu Nagayama, Shin'ichi Wakabayashi
A Design Method for Programmable Two-Variable Discrete Function Generators Using Spline and Bilinear Interpolations. DSD (2011)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
Floating-Point Numeric Function Generators Based on Piecewise-Split EVMDDs. ISMVL (2010)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
A Systematic Design Method for Two-Variable Numeric Function Generators Using Multiple-Valued Decision Diagrams. IEICE Trans. Inf. Syst. (8) (2010)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
Programmable Architectures and Design Methods for Two-Variable Numeric Function Generators. IPSJ Trans. Syst. LSI Des. Methodol. 3 (2010)
Yuichiro Utan, Shin'ichi Wakabayashi, Shinobu Nagayama
An FPGA-based text search engine for approximate regular expression matching. FPT (2010)
Yosuke Kawanaka, Shin'ichi Wakabayashi, Shinobu Nagayama
A Systolic String Matching Algorithm for High-Speed Recognition of a Restricted Regular Set. ERSA (2009)
Shinobu Nagayama, Tsutomu Sasao
Complexities of Graph-Based Representations for Elementary Functions. IEEE Trans. Computers 58 (1) (2009)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
Floating-Point Numerical Function Generators Using EVMDDs for Monotone Elementary Functions. ISMVL (2009)
Shinobu Nagayama, Jon T. Butler, Tsutomu Sasao
Programmable Numerical Function Generators for Two-Variable Functions. DSD (2008)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
Numerical function generators using bilinear interpolation. FPL (2008)
Shinobu Nagayama, Tsutomu Sasao
Representations of Two-Variable Elementary Functions Using EVMDDs and their Applications to Function Generators. ISMVL (2008)
Yosuke Kawanaka, Shin'ichi Wakabayashi, Shinobu Nagayama
A systolic regular expression pattern matching engine and its application to network intrusion detection. FPT (2008)
Yoshihiro Kimura, Shin'ichi Wakabayashi, Shinobu Nagayama
A Systolic Algorithm for the Quadratic Assignment Problem and its FPGA Implementation. FPT (2007)
Tsutomu Sasao, Shinobu Nagayama, Jon T. Butler
Numerical Function Generators Using LUT Cascades. IEEE Trans. Computers 56 (6) (2007)
Shinobu Nagayama, Tsutomu Sasao
Representations of Elementary Functions Using Edge-Valued MDDs. ISMVL (2007)
Shinobu Nagayama, Takeshi Hattori
A Proposal of RM QRM-MLD with Independent Adaptive Control of Surviving Symbol Replica Candidates for MIMO-OFDM System. VTC Fall (2007)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
Numerical Function Generators Using Edge-Valued Binary Decision Diagrams. ASP-DAC (2007)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
Design Method for Numerical Function Generators Based on Polynomial Approximation for FPGA Implementation. DSD (2007)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
Design Method for Numerical Function Generators Using Recursive Segmentation and EVBDDs. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2007)
Takayoshi Shimazu, Shin'ichi Wakabayashi, Shinobu Nagayama
A Parallel Multistage Metaheuristic Algorithm for VLSI Floorplanning. PDPTA (2007)
Shinobu Nagayama, Takeshi Hattori
A Proposal of QRM-MLD for Reduced Complexity of MLD to Detect MIMO Signals in Fading Environment. VTC Fall (2006)
Tsutomu Sasao, Shinobu Nagayama
Representations of Elementary Functions Using Binary Moment Diagrams. ISMVL (2006)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
Programmable numerical function generators based on quadratic approximation: architecture and synthesis method. ASP-DAC (2006)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler
Compact Numerical Function Generators Based on Quadratic Approximation: Architecture and Synthesis Method. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2006)
Shin'ichi Wakabayashi, Yoshihiro Kimura, Shinobu Nagayama
FPGA implementation of tabu search for the quadratic assignment problem. FPT (2006)
Tsutomu Sasao, Shinobu Nagayama, Jon T. Butler
Programmable Numerical Function Generators: Architectures and Synthesis Method. FPL (2005)
Shinobu Nagayama, Tsutomu Sasao
On the optimization of heterogeneous MDDs. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24 (11) (2005)
Shinobu Nagayama, Alan Mishchenko, Tsutomu Sasao, Jon T. Butler
Exact and Heuristic Minimization of the Average Path Length in Decision Diagrams. J. Multiple Valued Log. Soft Comput. 11 (5-6) (2005)
Shinobu Nagayama, Tsutomu Sasao
On the Minimization of Average Path Lengths for Heterogeneous MDDs. ISMVL (2004)
Shinobu Nagayama, Tsutomu Sasao
Minimization of memory size for heterogeneous MDDs. ASP-DAC (2004)
Shinobu Nagayama, Tsutomu Sasao
Compact Representations of Logic Functions using Heterogeneous MDDs. ISMVL (2003)
Shinobu Nagayama, Tsutomu Sasao
Compact Representations of Logic Functions Using Heterogeneous MDDs. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2003)
Shinobu Nagayama, Tsutomu Sasao, Yukihiro Iguchi, Munehiro Matsuura
Representations of Logic Functions Using QRMDDs. ISMVL (2002)