Mitchell A. Thornton

ORCID

Publication Activity (10 Years)

Years Active: 1993-2024
Publications (10 Years): 43

Top Venues

ISMVL

CoRR

SysCon

J. Multiple Valued Log. Soft Comput.

Publications

Jessie M. Henderson, Elena R. Henderson, Clayton A. Harper, Hiva Shahoei, William V. Oxford, Eric C. Larson, Duncan L. MacFarlane, Mitchell A. Thornton
A Photonic Physically Unclonable Function's Resilience to Multiple-Valued Machine Learning Attacks. CoRR (2024)
Clayton A. Harper, Mitchell A. Thornton, Eric C. Larson
Learnable Statistical Moments Pooling for Automatic Modulation Classification. ICASSP (2024)
Elena R. Henderson, Jessie M. Henderson, Hiva Shahoei, William V. Oxford, Eric C. Larson, Duncan L. MacFarlane, Mitchell A. Thornton
Designing a Photonic Physically Unclonable Function Having Resilience to Machine Learning Attacks. CoRR (2024)
Elena R. Henderson, Jessie M. Henderson, William V. Oxford, Mitchell A. Thornton
Automated Quantum Circuit Generation for Computing Inverse Hash Functions. CoRR (2024)
Matthew Lee, Clayton A. Harper, William Flinchbaugh, Eric C. Larson, Mitchell A. Thornton
Impacts of Synthetically Generated Data on Trackformer-based Multi-Object Tracking. AIPR (2023)
Clayton A. Harper, Mitchell A. Thornton, Eric C. Larson
Automatic Modulation Classification with Deep Neural Networks. CoRR (2023)
Joshua Sylvester, Matthew Lee, Daniel Canon Ellis, Mitchell A. Thornton, Eric C. Larson
Using Time Series Clustering to Inform Multimodal CNN Architectures. AIPR (2023)
Andrew Havard, Theodore W. Manikas, Eric C. Larson, Mitchell A. Thornton
CNN-Assisted Steganography - Integrating Machine Learning with Established Steganographic Techniques. CoRR (2023)
Zechariah Wolf, Eric Larson, Mitchell A. Thornton
Data Leakage in Isolated Virtualized Enterprise Computing Systems. ICISSP (2023)
Duncan L. MacFarlane, Hiva Shahoei, Ifeanyi G. Achu, Evan Stewart, William V. Oxford, Mitchell A. Thornton
Multiple-Valued Logic Physically Unclonable Function in Photonic Integrated Circuits. ISMVL (2023)
Aviraj Sinha, Mitchell A. Thornton
Quantum Multiple Valued Kernel Circuits. ISMVL (2022)
Michael A. Taylor, Eric C. Larson, Mitchell A. Thornton
General Process Detection Through Physical Side Channel Characterization. SysCon (2022)
Rob Oshana, Mitchell A. Thornton, Mike Caraman
A Side Channel Attack Detection System Using Processor Core Events and a Support Vector Machine. MECO (2022)
Matthew Lee, Joshua Sylvester, Sunjoli Aggarwal, Aviraj Sinha, Michael A. Taylor, Nathan Srirama, Eric C. Larson, Mitchell A. Thornton
Side Channel Identification using Granger Time Series Clustering with Applications to Control Systems. ICISSP (2022)
Aviraj Sinha, Elena R. Henderson, Jessie M. Henderson, Mitchell A. Thornton
Automated Quantum Memory Compilation with Improved Dynamic Range. CoRR (2022)
Michael A. Taylor, Eric C. Larson, Mitchell A. Thornton
Rapid Ransomware Detection through Side Channel Exploitation. CSR (2021)
Clayton A. Harper, Aviraj Sinha, Mitchell A. Thornton, Eric C. Larson
SNR-Boosted Automatic Modulation Classification. ACSCC (2021)
Rob Oshana, Mitchell A. Thornton, Eric C. Larson, Xavier Roumegue
Real-Time Edge Processing Detection of Malicious Attacks Using Machine Learning and Processor Core Events. SysCon (2021)
Aviraj Sinha, Michael A. Taylor, Nathan Srirama, Theodore W. Manikas, Eric C. Larson, Mitchell A. Thornton
Industrial Control System Anomaly Detection Using Convolutional Neural Network Consensus. CCTA (2021)
Kaitlin N. Smith, Mitchell A. Thornton, D. Michael Miller
Fast Minimization of Polynomial Decomposition using Fixed-Polarity Pascal Transforms. ISMVL (2020)
Xiaoran Wang, Tianwei Liu, Shita Guo, Mitchell A. Thornton, Ping Gui
A 2.56-Gb/s Serial Wireline Transceiver That Supports an Auxiliary Channel in 65-nm CMOS. IEEE Trans. Very Large Scale Integr. Syst. 28 (1) (2020)
Mitchell A. Thornton
Introduction to Quantum Computation Reliability. ITC (2020)
Clayton A. Harper, Lauren Lyons, Mitchell A. Thornton, Eric C. Larson
Enhanced Automatic Modulation Classification using Deep Convolutional Latent Space Pooling. ACSSC (2020)
Kaitlin N. Smith, Duncan L. MacFarlane, Mitchell A. Thornton
A Quantum Photonic TRNG based on Quaternary Logic. ISMVL (2020)
Kaitlin N. Smith, Mitchell A. Thornton
Higher Dimension Quantum Entanglement Generators. ACM J. Emerg. Technol. Comput. Syst. 16 (1) (2020)
Kaitlin N. Smith, Mitchell A. Thornton
Fixed Polarity Pascal Transforms with Symbolic Computer Algebra Applications. PACRIM (2019)
Kaitlin N. Smith, Mitchell A. Thornton
Entanglement in Higher-Radix Quantum Systems. ISMVL (2019)
Kaitlin N. Smith, Mitchell A. Thornton
Quantum Logic Synthesis with Formal Verification. MWSCAS (2019)
Tyler Giallanza, Erik Gabrielsen, Michael A. Taylor, Eric C. Larson, Mitchell A. Thornton
Task Value Calculus: Multi-Objective Trade off Analysis Using Multiple-Valued Decision Diagrams. ISMVL (2019)
Tyler Giallanza, Travis Siems, Elena Smith, Erik Gabrielsen, Ian Johnson, Mitchell A. Thornton, Eric C. Larson
Keyboard Snooping from Mobile Phone Arrays with Mixed Convolutional and Recurrent Neural Networks. Proc. ACM Interact. Mob. Wearable Ubiquitous Technol. 3 (2) (2019)
Kaitlin N. Smith, Mitchell A. Thornton
A quantum computational compiler and design tool for technology-specific targets. ISCA (2019)
Kaitlin N. Smith, Mitchell A. Thornton
Entangled State Preparation for Non-Binary Quantum Computing. ICRC (2019)
Micah Thornton, Mitchell A. Thornton
Multiple-Valued Random Digit Extraction. ISMVL (2018)
Kaitlin N. Smith, Tim LaFave, Duncan L. MacFarlane, Mitchell A. Thornton
A Radix-4 Chrestenson Gate for Optical Quantum Computation. ISMVL (2018)
Kaitlin N. Smith, Tim LaFave, Duncan L. MacFarlane, Mitchell A. Thornton
Higher-Radix Chrestenson Gates for Photonic Quantum Computation. FLAP 5 (9) (2018)
Mitchell A. Thornton, Duncan L. MacFarlane
Quantum Photonic TRNG with Dual Extractor. QTOP@NetSys (2017)
David Kebo Houngninou, Mitchell A. Thornton
Simulation of switching circuits using transfer functions. MWSCAS (2017)
Kaitlin N. Smith, Michael A. Taylor, Anna A. Carroll, Theodore W. Manikas, Mitchell A. Thornton
Automated Markov-chain based analysis for large state spaces. SysCon (2017)
Saurabh D. Gupta, Mitchell A. Thornton
A Fixed-Point Squaring Algorithm Using an Implicit Arbitrary Radix Number System. IEEE J. Emerg. Sel. Topics Circuits Syst. 6 (1) (2016)
David Kebo Houngninou, Mitchell A. Thornton
Implementation of switching circuit models as transfer functions. ISCAS (2016)
Philip C. Davis, Mitchell A. Thornton, Theodore W. Manikas
Reliability block diagram extensions for non-parametric probabilistic analysis. SysCon (2016)
Adel R. Alharbi, Mitchell A. Thornton
Demographic Group Prediction Based on Smart Device User Recognition Gestures. ICMLA (2016)
Philipp Niemann, Robert Wille, D. Michael Miller, Mitchell A. Thornton, Rolf Drechsler
QMDDs: Efficient Quantum Function Representation and Manipulation. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 35 (1) (2016)
David Y. Feinstein, Mitchell A. Thornton
Quantum Multiple-Valued Decision Diagrams Containing Skipped Variables. J. Multiple Valued Log. Soft Comput. 24 (1-4) (2015)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, Mitchell A. Thornton, Theodore W. Manikas
Edge Reduction for EVMDDs to Speed Up Analysis of Multi-state Systems. ISMVL (2015)
Theodore W. Manikas, Mitchell A. Thornton, David Y. Feinstein
Modeling System Threat Probabilities Using Mixed-Radix Multiple-Valued Logic Decision Diagrams. J. Multiple Valued Log. Soft Comput. 24 (1-4) (2015)
Adel R. Alharbi, Mitchell A. Thornton
Demographic Group Classification of Smart Device Users. ICMLA (2015)
Mitchell A. Thornton
Simulation and Implication Using a Transfer Function Model for Switching Logic. IEEE Trans. Computers 64 (12) (2015)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, Mitchell A. Thornton, Theodore W. Manikas
Analysis Methods of Multi-state Systems Partially Having Dependent Components Using Multiple-Valued Decision Diagrams. ISMVL (2014)
Shinobu Nagayama, Tsutomu Sasao, Jon T. Butler, Mitchell A. Thornton, Theodore W. Manikas
On Optimizations of Edge-Valued MDDs for Fast Analysis of Multi-State Systems. IEICE Trans. Inf. Syst. (9) (2014)
Eric Durant, John Impagliazzo, Susan Conry, Robert B. Reese, Mitchell A. Thornton, Herman Lam, Victor P. Nelson
Setting the stage for CE2016: A revised body of knowledge. FIE (2014)
Rohit P. Menon, Mitchell A. Thornton
Clock Distribution Area Reduction Using a Multiple-Valued Clocking Approach. J. Multiple Valued Log. Soft Comput. 22 (1-2) (2014)
Mitchell A. Thornton, Theodore W. Manikas, Stephen A. Szygenda, Shinobu Nagayama
System Probability Distribution Modeling Using MDDs. ISMVL (2014)
Mitchell A. Thornton, Theodore W. Manikas
Spectral Response of Ternary Logic Netlists. ISMVL (2013)
Mitchell A. Thornton
A Transfer Function Model for Ternary Switching Logic Circuits. ISMVL (2013)
Jason Moore, Mitchell A. Thornton, David W. Matula
Low power floating-point multiplication and squaring units with shared circuitry. MWSCAS (2013)
Mitchell A. Thornton, Jennifer Dworak
Ternary Logic Network Justification Using Transfer Matrices. ISMVL (2013)
Eric Durant, John Impagliazzo, Susan Conry, Andrew D. McGettrick, Mitchell A. Thornton, Timothy Wilson
Computer engineering curriculum guidelines. FIE (2013)
Mitchell A. Thornton, Theodore W. Manikas, Phillip A. Laplante
Embedded and real-time systems classes in traditional and distance education format. FIE (2013)
Mitchell A. Thornton
Professional Licensure for Software Engineers: An Update. Comput. Sci. Eng. 14 (5) (2012)
Robert B. Reese, Scott C. Smith, Mitchell A. Thornton
Uncle - An RTL Approach to Asynchronous Design. ASYNC (2012)
David Y. Feinstein, Mitchell A. Thornton
Using the Asynchronous Paradigm for Reversible Sequential Circuit Implementation. ISMVL (2012)
Rohit P. Menon, Mitchell A. Thornton
Global Multiple-Valued Clock Approach for High- Performance Multi-phase Clock Integrated Circuits. ISMVL (2012)
Theodore W. Manikas, David Y. Feinstein, Mitchell A. Thornton
Modeling Medical System Threats with Conditional Probabilities Using Multiple-Valued Logic Decision Diagrams. ISMVL (2012)
David Y. Feinstein, Mitchell A. Thornton
Reversible Logic Synthesis Based on Decision Diagram Variable Ordering. J. Multiple Valued Log. Soft Comput. 19 (4) (2012)
John Impagliazzo, Susan Conry, Eric Durant, Andrew D. McGettrick, Mitchell A. Thornton, Timothy Wilson
Computer engineering review task force report. SIGCSE (2012)
Theodore W. Manikas, Mitchell A. Thornton, David Y. Feinstein
Using Multiple-Valued Logic Decision Diagrams to Model System Threat Probabilities. ISMVL (2011)
David Y. Feinstein, Mitchell A. Thornton
On the Skipped Variables of Quantum Multiple-Valued Decision Diagrams. ISMVL (2011)
Steven F. Barrett, Mitchell A. Thornton
To PE or not to PE: the Sequel. Comput. Sci. Eng. 12 (4) (2010)
Satyendra R. Datla, Mitchell A. Thornton
Quaternary Voltage-Mode Logic Cells and Fixed-Point Multiplication Circuits. ISMVL (2010)
Satyendra R. Datla, Mitchell A. Thornton, Luther Hendrix, Dave Henderson
Quaternary Addition Circuits Based on SUSLOC Voltage-Mode Cells and Modeling with SystemVerilog©. ISMVL (2009)
Alex Fit-Florea, Lun Li, Mitchell A. Thornton, David W. Matula
: Algorithms and Lookup Structures. IEEE Trans. Computers 58 (2) (2009)
David Y. Feinstein, Mitchell A. Thornton, D. Michael Miller
Minimization of Quantum Multiple-valued Decision Diagrams Using Data Structure Metrics. J. Multiple Valued Log. Soft Comput. 15 (4) (2009)
Satyendra R. Datla, Mitchell A. Thornton, David W. Matula
A Low Power High Performance Radix-4 Approximate Squaring Circuit. ASAP (2009)
David Y. Feinstein, Mitchell A. Thornton
On the Guidance of Reversible Logic Synthesis by Dynamic Variable Reordering. ISMVL (2009)
Mitchell A. Thornton, David W. Matula, Laura Spenner, D. Michael Miller
Quantum Logic Implementation of Unary Arithmetic Operations. ISMVL (2008)
David Y. Feinstein, Mitchell A. Thornton, D. Michael Miller
Partially Redundant Logic Detection Using Symbolic Equivalence Checking in Reversible and Irreversible Logic Circuits. DATE (2008)
David Y. Feinstein, Mitchell A. Thornton, D. Michael Miller
On the Data Structure Metrics of Quantum Multiple-Valued Decision Diagrams. ISMVL (2008)
Chad M. Lawler, Michael A. Harper, Stephen A. Szygenda, Mitchell A. Thornton
Components of disaster-tolerant computing: analysis of disaster recovery, IT application downtime and executive visibility. Int. J. Bus. Inf. Syst. 3 (3) (2008)
Jason Moore, Mitchell A. Thornton, David W. Matula
A low power radix-4 dual recoded integer squaring implementation for use in design of application specific arithmetic circuits. ACSCC (2008)
Chad M. Lawler, Michael A. Harper, Mitchell A. Thornton
Components and Analysis of Disaster Tolerant Computing. IPCCC (2007)
Mahsan Amoui, Daniel Große, Mitchell A. Thornton, Rolf Drechsler
Evaluation of Toggle Coverage for MVL Circuits Specified in the SystemVerilog HDL. ISMVL (2007)
D. Michael Miller, David Y. Feinstein, Mitchell A. Thornton
Variable Reordering and Sifting for QMDD. ISMVL (2007)
D. Michael Miller, David Y. Feinstein, Mitchell A. Thornton
QMDD Minimization Using Sifting for Variable Reordering. J. Multiple Valued Log. Soft Comput. 13 (4-6) (2007)
David Y. Feinstein, V. S. S. Nair, Mitchell A. Thornton
Advances in Quantum Computing Fault Tolerance and Testing. HASE (2007)
Lun Li, Frank P. Coyle, Mitchell A. Thornton
Automatic High Level Assertion Generation and Synthesis for Embedded System Design. FDL (2007)
D. Michael Miller, Mitchell A. Thornton
QMDD: A Decision Diagram Structure for Reversible and Quantum Circuits. ISMVL (2006)
Lun Li, Mitchell A. Thornton, Marek A. Perkowski
A Quantum CAD Accelerator Based on Grover's Algorithm for Finding the Minimum Fixed Polarity Reed-Muller Form. ISMVL (2006)
D. Michael Miller, Mitchell A. Thornton, David Goodman
A Decision Diagram Package for Reversible and Quantum Circuit Simulation. IEEE Congress on Evolutionary Computation (2006)
Lun Li, Mitchell A. Thornton, David W. Matula
A digit serial algorithm for the integer power operation. ACM Great Lakes Symposium on VLSI (2006)
Lun Li, Alex Fit-Florea, Mitchell A. Thornton, David W. Matula
Performance Evaluation of a Novel Direct Table Lookup Method and Architecture with Application to 16-bit Integer Functions. ASAP (2006)
Robert B. Reese, Mitchell A. Thornton, Cherrice Traver, David Hemmendinger
Early evaluation for performance enhancement in phased logic. IEEE Trans. Comput. Aided Des. Integr. Circuits Syst. 24 (4) (2005)
Frank P. Coyle, Mitchell A. Thornton
A Framework and Process for Curricular Integration and Innovation Using Project Based Interdisciplinary Teams. ITCC (1) (2005)
Mitchell A. Thornton
The Karhunen-Loève Transform of Discrete MVL Functions. ISMVL (2005)
Lun Li, Alex Fit-Florea, Mitchell A. Thornton, David W. Matula
. ISVLSI (2005)
Robert B. Reese, Mitchell A. Thornton, Cherrice Traver
A Coarse-Grain Phased Logic CPU. IEEE Trans. Computers 54 (7) (2005)
Ralph Marczynski, Mitchell A. Thornton, Stephen A. Szygenda
Test vector generation and classification using FSM traversals. ISCAS (5) (2004)
Kenneth Fazel, Lun Li, Mitchell A. Thornton, Robert B. Reese, Cherrice Traver
Performance enhancement in phased logic circuits using automatic slack-matching buffer insertion. ACM Great Lakes Symposium on VLSI (2004)
Mitchell A. Thornton, D. Michael Miller
Computation of Discrete Function Chrestenson Spectrum Using Cayley Color Graphs. J. Multiple Valued Log. Soft Comput. 10 (2) (2004)
Lun Li, Mitchell A. Thornton, Stephen A. Szygenda
A Genetic Approach for Conjunction Scheduling in Symbolic Equivalence Checking. ISVLSI (2004)

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Publication Activity (10 Years)

Top Topics

Top Venues

Mitchell A. Thornton