Takashi Imagawa

Publication Activity (10 Years)

Years Active: 2009-2023
Publications (10 Years): 16

Top Topics

Image Smoothing

Reconfigurable Architecture

Video Communication

Top Venues

IEICE Trans. Fundam. Electron. Commun. Comput. Sci.

Publications

Xuanqi Li, Takashi Imagawa, Hiroyuki Ochi
Finding All Solutions of Multi-terminal Numberlink Problem Utilizing Top-down ZDD Construction. ASICON (2023)
Ippei Tanaka, Naoyuki Miyagawa, Tomoya Kimura, Takashi Imagawa, Hiroyuki Ochi
A CMOS-compatible Non-volatile Memory Element using Fishbone-in-cage Capacitor. IPSJ Trans. Syst. LSI Des. Methodol. 16 (2023)
Renya Makimoto, Takashi Imagawa, Hiroyuki Ochi
Approximate Logarithmic Multipliers Using Half Compensation with Two Line Segments. SOCC (2023)
Takashi Imagawa, Jaehoon Yu, Masanori Hashimoto, Hiroyuki Ochi
MUX Granularity Oriented Iterative Technology Mapping for Implementing Compute-Intensive Applications on Via-Switch FPGA. DATE (2021)
Masanori Hashimoto, Xu Bai, Naoki Banno, Munehiro Tada, Toshitsugu Sakamoto, Jaehoon Yu, Ryutaro Doi, Yusuke Araki, Hidetoshi Onodera, Takashi Imagawa, Hiroyuki Ochi, Kazutoshi Wakabayashi, Yukio Mitsuyama, Tadahiko Sugibayashi
33.3 Via-Switch FPGA: 65nm CMOS Implementation and Architecture Extension for Al Applications. ISSCC (2020)
Hiroyuki Ochi, Kosei Yamaguchi, Tetsuaki Fujimoto, Junshi Hotate, Takashi Kishimoto, Toshiki Higashi, Takashi Imagawa, Ryutaro Doi, Munehiro Tada, Tadahiko Sugibayashi, Wataru Takahashi, Kazutoshi Wakabayashi, Hidetoshi Onodera, Yukio Mitsuyama, Jaehoon Yu, Masanori Hashimoto
Via-Switch FPGA: Highly Dense Mixed-Grained Reconfigurable Architecture With Overlay Via-Switch Crossbars. IEEE Trans. Very Large Scale Integr. Syst. 26 (12) (2018)
Yoshikazu Miyanaga, Masaki Miura, Tohru Gotoh, Junji Yamano, Takashi Imagawa, Hiroshi Tsutsui
Development of High Performance RF Modules Used in Real-time FHD Video Communication over 8x8 MIMO-OFDM System. ISPACS (2018)
Yoshikazu Miyanaga, Junji Yamano, Masaki Miura, Tohru Gotoh, Takashi Imagawa, Hiroshi Tsutsui
Development of Real-time FHD Loss-Less Video Communication over an $8\times 8$ MIMO-OFDM System. APSIPA (2018)
Yoshikazu Miyanaga, Hiroshi Tsutsui, Takashi Imagawa
FHD loss-less video communication over 8 × 8 MIMO-OFDM. ISCIT (2017)
Takashi Imagawa, Koki Honda, Hiroyuki Ochi
Placement algorithm for mixed-grained reconfigurable architecture with dedicated carry chain. SoCC (2017)
Ryosuke Koike, Takashi Imagawa, Roberto Yusi Omaki, Hiroyuki Ochi
Selectable grained reconfigurable architecture (SGRA) and its design automation. SoCC (2017)
Dabwitso Kasauka, Hiroshi Tsutsui, Seijiro Imai, Takashi Imagawa, Hiroyuki Okuhata, Yoshikazu Miyanaga
Image smoothing in the spatial domain using multigrid conjugate gradient methods based on accelerated iterative shrinkage. APSIPA (2016)
Seijiro Imai, Dabwitso Kasauka, Hiroshi Tsutsui, Takashi Imagawa, Hiroyuki Okuhata, Yoshikazu Miyanaga
Processing time reduction of tone mapping based on iterative shrinkage smoothing using parallel processing. ISPACS (2016)
Takashi Imagawa, Masayuki Hiromoto, Hiroyuki Ochi, Takashi Sato
An Error Correction Scheme through Time Redundancy for Enhancing Persistent Soft-Error Tolerance of CGRAs. IEICE Trans. Electron. (7) (2015)
Masanori Hashimoto, Dawood Alnajiar, Hiroaki Konoura, Yukio Mitsuyama, Hajime Shimada, Kazutoshi Kobayashi, Hiroyuki Kanbara, Hiroyuki Ochi, Takashi Imagawa, Kazutoshi Wakabayashi, Takao Onoye, Hidetoshi Onodera
Reliability-configurable mixed-grained reconfigurable array compatible with high-level synthesis. ASP-DAC (2015)
Dabwitso Kasauka, Hiroshi Tsutsui, Hiroyuki Okuhata, Takashi Imagawa, Yoshikazu Miyanaga
Image smoothing using spatial iterative methods based on accelerated iterative shrinkage. APSIPA (2015)
Hiroaki Konoura, Dawood Alnajiar, Yukio Mitsuyama, Hajime Shimada, Kazutoshi Kobayashi, Hiroyuki Kanbara, Hiroyuki Ochi, Takashi Imagawa, Kazutoshi Wakabayashi, Masanori Hashimoto, Takao Onoye, Hidetoshi Onodera
Reliability-Configurable Mixed-Grained Reconfigurable Array Supporting C-Based Design and Its Irradiation Testing. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2014)
Hiroaki Konoura, Takashi Imagawa, Yukio Mitsuyama, Masanori Hashimoto, Takao Onoye
Comparative Evaluation of Lifetime Enhancement with Fault Avoidance on Dynamically Reconfigurable Devices. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (7) (2014)
Takashi Imagawa, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
A Cost-Effective Selective TMR for Coarse-Grained Reconfigurable Architectures Based on DFG-Level Vulnerability Analysis. IEICE Trans. Electron. (4) (2013)
Takashi Imagawa, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
High-speed DFG-level SEU vulnerability analysis for applying selective TMR to resource-constrained CGRA. ISQED (2013)
Takashi Imagawa, Hiroshi Tsutsui, Hiroyuki Ochi, Takashi Sato
A cost-effective selective TMR for heterogeneous coarse-grained reconfigurable architectures based on DFG-level vulnerability analysis. DATE (2013)
Hiroaki Konoura, Dawood Alnajiar, Yukio Mitsuyama, Hiroyuki Ochi, Takashi Imagawa, Shinichi Noda, Kazutoshi Wakabayashi, Masanori Hashimoto, Takao Onoye
Mixed-grained reconfigurable architecture supporting flexible reliability and C-based design. ReConFig (2013)
Takashi Imagawa, Masayuki Hiromoto, Hiroyuki Ochi, Takashi Sato
A routing architecture exploration for coarse-grained reconfigurable architecture with automated seu-tolerance evaluation. SoCC (2010)
Takashi Imagawa, Masayuki Hiromoto, Hiroyuki Ochi, Takashi Sato
Reliability Evaluation Environment for Exploring Design Space of Coarse-Grained Reconfigurable Architectures. IEICE Trans. Fundam. Electron. Commun. Comput. Sci. (12) (2010)
Dawood Alnajiar, Younghun Ko, Takashi Imagawa, Hiroaki Konoura, Masayuki Hiromoto, Yukio Mitsuyama, Masanori Hashimoto, Hiroyuki Ochi, Takao Onoye
Coarse-grained dynamically reconfigurable architecture with flexible reliability. FPL (2009)