Katayoon Basharkhah

Publication Activity (10 Years)

Years Active: 2018-2023
Publications (10 Years): 12

Top Topics

Control Program

Compute Intensive

Convolution Kernel

Top Venues

Publications

Katayoon Basharkhah, Raheleh Sadat Mirhashemi, Nooshin Nosrati, Mohammad-Javad Zare, Zainalabedin Navabi
Learning Electrical Behavior of Core Interconnects for System-Level Crosstalk Prediction. ETS (2023)
Mohammad Rasoul Roshanshah, Katayoon Basharkhah, Zainalabedin Navabi
Online Testing of a Row-Stationary Convolution Accelerator. ETS (2021)
Nooshin Nosrati, Katayoon Basharkhah, Hanieh Totonchi Asl, Zahra Mahdavi, Zainalabedin Navabi
Testing a RISCV-Like Architecture With an HDL-Based Virtual Tester. DTIS (2021)
Saba Yousefzadeh, Katayoon Basharkhah, Nooshin Nosrati, Maryam Rajabalipanah, Seyedeh Maryam Ghasemi, Zainalabedin Navabi
Reconfiguration of Embedded Accelerators by Microprogramming for Intensive Loop Computations. DDECS (2020)
Maryam Rajabalipanah, Seyedeh Maryam Ghasemi, Nooshin Nosrati, Katayoon Basharkhah, Saba Yousefzadeh, Zainalabedin Navabi
Reducing DFT hardware overhead by use of a test microprogram in a microprogrammed hardware accelerator. DFT (2020)
Katayoon Basharkhah, Rezgar Sadeghi, Nooshin Nosrati, Zainalabedin Navabi
ESL, Back-annotating Crosstalk Fault Models into High-level Communication Links. VTS (2020)
Nooshin Nosrati, Katayoon Basharkhah, Rezgar Sadeghi, Zainalabedin Navabi
An ESL Environment for Modeling Electrical Interconnect Faults. ISVLSI (2019)
Rezgar Sadeghi, Nooshin Nosrati, Katayoon Basharkhah, Zainalabedin Navabi
Back-annotation of Interconnect Physical Properties for System-Level Crosstalk Modeling. ETS (2019)
Nooshin Nosrati, Katayoon Basharkhah, Rezgar Sadeghi, Carna Zivkovic, Christoph Grimm, Zainalabedin Navabi
Making System Level Test Possible by a Mixed-mode, Multi-level, Integrated Modeling Environment. EWDTS (2019)
Saba Yousefzadeh, Katayoon Basharkhah, Nooshin Nosrati, Rezgar Sadeghi, Jaan Raik, Maksim Jenihhin, Zainalabedin Navabi
An Accelerator-based Architecture Utilizing an Efficient Memory Link for Modern Computational Requirements. EWDTS (2019)
Samira Ahmadi Farsani, Katayoon Basharkhah, Amin Mohaghegh, Zainalabedin Navabi
From Abstract Modeling of ADAS Applications to an Accelerator-based Hardware Realization. EWDTS (2019)
Siavash Amin-Nejad, Tayyebeh Asgari Gashteroodkhani, Katayoon Basharkhah
A Comparison of MVDR and LCMV Beamformers' Floating Point Implementations on FPGAs. Wirel. Pers. Commun. 98 (2) (2018)