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High-Level Combined Deterministic and Pseudo-exhuastive Test Generation for RISC Processors.
Adeboye Stephen Oyeniran
Raimund Ubar
Maksim Jenihhin
Cemil Cem Gürsoy
Jaan Raik
Published in:
ETS (2019)
Keyphrases
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test generation
high level
instruction set
test cases
low level
test sequences
symbolic execution
static analysis
design automation
mutation testing
application specific
parallel algorithm
parallel computing
quality assurance
programming language
software testing